TFT array substrate and the fabrication method thereof

A TFT (thin film transistor) array substrate comprising:

• a gate electrode connected to a gate line;
• a source electrode connected to a data line;
• a pixel region defined by crossing the gate line and the data line;
• a drain electrode facing the source electrode with a channel in between;
• a semiconductor layer forming the channel between the source electrode and the drain electrode;
• a pixel electrode disposed in the pixel region and contacting the drain electrode;
• a channel passivation layer formed the semiconductor layer;
• a gate pad having a gate pad lower electrode that extends from the gate line;
• a data pad having a data pad lower electrode separated from the data line;
• even and odd data lines that apply a signal to the data pad, wherein the even and odd data lines is formed of the same material as the gate electrode, wherein the even and odd data lines are connected to a first shorting bar and a second shorting bar, respectively, wherein the first shorting bar is formed of the same material as the gate electrode and the second shorting bar is formed of the same material as the drain electrode;
• a static electricity prevention line pattern connected to one of the even and odd data lines, and
• a plurality of transparent conductive pattern formed of the same material as the pixel electrode on the data line, the source and drain electrodes, respectively,
• wherein a space between the transparent conductive pattern formed on the source electrode and the transparent conductive pattern formed on the drain electrode are 4-5 μm, and a space between the transparent conductive pattern formed on the data line and the pixel electrode are 4-5 μm,
• wherein the even data lines have an H-shaped ground line.