Method of forming a split gate memory device and apparatus

A method of forming a split-gate memory device comprising:

• forming a counter doped region proximate a top surface of a substrate in at least first and second portions, wherein the counter doped region is configured to modify a work function of a channel region within the first and second portions of the substrate;
• forming a select gate having a first work function overlying a first portion of a substrate, wherein forming the select gate includes (i) forming a layer of select gate dielectric over at least the first portion of the substrate, (ii) forming a layer of select gate material overlying the layer of select gate dielectric, and (iii) implanting dopant into the layer of select gate material, wherein the dopant comprises a conductivity type suitable for establishing the first work function;
• forming a control gate having a second work function overlying a second portion of the substrate proximate the first portion, wherein (i) for a first majority carrier type split-gate memory device, wherein the first majority carrier type comprises electrons, the first work function is greater than the second work function and (ii) for a second majority carrier type split-gate memory device, wherein the second majority carrier type comprises holes, the first work function is less than the second work function;
• forming a first current electrode in the substrate;
• and
• forming a second current electrode in the substrate separated from the first current electrode by a channel underlying the control gate and select gate.