US 7,782,141 B2Granted

Adaptive signal-feed-forward circuit and method for reducing amplifier power without signal distortion

AssigneeTexas Instruments Incorporated

InventorsSteven B. Witmer, Lunal Khuon, Brian K. Kullberg

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Abstract

Digital amplifying circuitry delays a digital data signal (INR) to produce an output signal (VoutR). The delayed digital data signal is converted to an analog signal (VinR) for amplifying by an amplifier (10R). Signal amplitude information (S_R[n]) contained in the incoming digital data signal is detected during the delaying. The signal amplitude information is converted to a first control signal (S_Io_NEG[n]) in response to which an adjustable maximum available supply current of the amplifier is produced of least sufficient magnitude to avoid distortion during the amplifying to produce the output signal. The signal amplitude information also is converted to a second control signal (S_AMPLITUDE[n]) in response to which a supply voltage (VNEG) of the amplifier is controlled.

Claims21

Dependent claims

Circuitry for reducing power in a digital amplifying system, comprising:

a first digital delay circuit for receiving and delaying a first incoming digital data signal which represents a first analog input signal;
a first digital-to-analog conversion circuit for receiving the delayed first digital data signal from the first digital delay circuit and converting the delayed first data to a first analog signal;
a first amplifier for amplifying the first analog signal to produce a first output voltage applied to a first load;
a digital signal processing system for receiving the first incoming data signal, detecting first signal amplitude information contained in the first incoming digital data, and converting the first signal amplitude information to a first digital control signal to optimize power efficiency of the digital amplifying system;
and
power conversion circuitry for converting the first digital control signal to an adjustable maximum available supply current in a first supply conductor of the first amplifier circuitry of at least sufficient magnitude to avoid distortion during the amplifying of the first analog signal to produce the first output voltage, wherein the power conversion circuitry includes a charge pump for producing the adjustable maximum available supply current so as to maintain a first supply voltage on the first supply conductor, switching of the charge pump being controlled by a first clock signal.

3 more elements

A method for reducing power dissipated in a digital amplifying system, comprising:

delaying an incoming digital data signal;
converting the delayed digital data signal to an analog signal to be amplified by an amplifier to produce an output signal;
during the delaying, detecting signal amplitude information contained in the incoming digital data;
converting the signal amplitude information to a first digital control signal;
and
producing an adjustable maximum available supply current of the amplifier in response to the first digital control signal such that the adjustable maximum available supply current of the amplifier has at least sufficient magnitude to avoid causing signal distortion during amplifying of the analog signal by means of the amplifier to produce the output signal by controlling a first clock signal that controls a switching frequency of a charge pump so as to maintain a predetermined value of a first supply voltage on a first supply conductor of the amplifier during time-varying load currents.

3 more elements

An apparatus comprising:

a digital signal processing system that receives a digital input signal and a gain signal;
a delay circuit that receive the digital input signal;
a digital-to-analog conversion circuit that is coupled to the delay circuit;
a power converter having:
a DC-DC converter that is coupled to the digital signal processing system and that generates a first voltage;
and
a charge pump that is coupled to the digital signal processing system and the DC-DC converter and that generates a second voltage;
an amplifier having an input terminal, a high-side power terminal, and a low-side power terminal, wherein the input terminal of the amplifier is coupled to the delay circuit, and wherein the high-side power terminal is coupled to the DC-DC converter so as to receive the first voltage, and wherein the low-side power terminal is coupled to the charge pump so as to receive the second voltage.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/317,793Filed 29 Dec 2008
Published: US 2010/0164630 A11 Jul 2010
Granted: 24 Aug 2010
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H03F 3/68
Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements: combinations of amplifiers, e.g. multi-channel…
H03F 1/0244
With control of the supply voltage or current: stepped control
H03F 1/0261
In transistor amplifiers: with control of the polarisation voltage or current, e.g. gliding Class A
H03F 1/3223
Modifications of amplifiers to reduce non-linear distortion: using feed-forward