Low power low voltage differential signaling (LVDS) output drivers

A low voltage differential signaling driver circuit the circuit comprising:

• a first differential pair of transistors;
• a pair of transconductances stages;
• a second differential pair of transistors that is coupled to the pair of transconductances stages;
• a first current source that is coupled to the first differential pair to provide current to the first differential pair of transistors;
• a second current source that is coupled to the second differential pair to provide current to the second differential pair of transistors;
• a pair of transresistance amplifiers that is coupled to the first differential pair and that is driven by the pair of transconductance stages;
• an output port configured to have a common mode output voltage and a differential output voltage, wherein each of the common mode output voltage and the differential output voltage is based on a state of the first differential pair of transistors and the second differential pair of transistors;
• and
• a protection transistors to conduct current into the transconductance stages to provide short-circuit protection.

A low voltage differential signaling driver circuit, the circuit comprising:

• a first differential pair of PNP bipolar transistors and a second differential pair of PNP bipolar transistors, wherein each PNP bipolar transistor includes a base terminal coupled to a differential input and one PNP bipolar transistor of each pair is coupled to one terminal of the differential input;
• a first PNP current source including a base terminal coupled to a bias input voltage, an emitter terminal coupled to a power supply terminal, and a collector terminal coupled to the first differential pair of PNP bipolar transistors;
• a second PNP current source including a base terminal coupled to a bias input voltage, an emitter terminal coupled to a power supply terminal, and a collector terminal coupled to the first differential pair of PNP bipolar transistors;
• a pair of transresistance amplifiers, each transresistance amplifier comprising an NPN bipolar transistor and a resistor coupling a base terminal of the NPN bipolar transistor to a collector terminal of the NPN bipolar transistor, wherein one transresistance amplifier is coupled to one PNP bipolar transistor of the first differential pair at one terminal of a differential output and the second transresistance amplifier is coupled to the second PNP bipolar transistor of the first differential pair at the second terminal of the differential output;
• a pair of current mirrors, wherein one current mirror is coupled to one PNP bipolar transistor of the second differential pair and provides a current to the base terminal of the NPN bipolar transistor of one transresistance amplifier, and the second current mirror is coupled to the second PNP bipolar transistor of the second differential pair and provides a current to the base terminal of the NPN bipolar transistor of the second transresistance amplifier;
• and
• a common mode feedback block coupled to the differential output terminals and coupled to a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is coupled between the first transresistance amplifier and a reference terminal, and the second field effect transistor is coupled between the second transresistance amplifier and the reference terminal.

An apparatus comprising:

• an input stage that receives a differential input signal;
• and
• a low voltage differential signaling output driver having:
• a first differential input transistor pair that is coupled to the input stage;
• a second differential input transistor pair that is coupled to the input stage;
• a first current mirror having a first terminal and a second terminal, wherein the first terminal of the first current mirror is coupled to a first transistor from the first differential input transistor pair;
• a first diode that is coupled between the first and second terminals of the first current mirror;
• a second current mirror having a first terminal and a second terminal, wherein the first terminal of the first current mirror is coupled to a second transistor from the first differential input transistor pair;
• a second diode that is coupled between the first and second terminals of the second current mirror;
• a first amplifier that is coupled to the second terminal of the first current mirror and to a first transistor from the second differential input transistor pair;
• and
• a second amplifier that is coupled to the second terminal of the second current mirror and a second transistor from the second differential input transistor pair.