# US 7,777,291 B2 · Integrated circuits having interconnects and heat dissipators based on nanostructures

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- Number: US 7,777,291 B2
- Document ID: US7777291B2
- Status: Granted
- Kind: B2
- Application number: 11/511,867
- Filed: 2006-08-28
- Published: 2007-05-03
- Granted: 2010-08-17
- Earliest claimed: 2005-08-26
- Assignees: Smoltek AB
- Inventors: Mohammad Shafiqul Kabir
- Web page: https://patentgrep.com/patent/US7777291B2

## CPC

- B01J 23/755: Nickel
- B01J 23/76: combined with metals, oxides or hydroxides provided for in groups B01J23/02 - B01J23/36
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- B82Y 30/00: Nanotechnology for materials or surface science, e.g. nanocomposites
- B82Y 40/00: Manufacture or treatment of nanostructures
- C01B 32/162: characterised by catalysts
- C23C 16/04: Coating on selected surface areas, e.g. using masks
- C23C 16/26: Deposition of carbon only
- D01F 9/08: of inorganic material (working or processing of metal wire B21F; from softened glass, minerals or slags C03B37/00)
- D01F 9/127: by thermal decomposition of hydrocarbon gases or vapours {or other carbon-containing compounds in the form of gas or vapour, e.g. carbon monoxide, alcohols}
- H01B 1/04: mainly consisting of carbon-silicon compounds, carbon or silicon
- H01J 1/304: Field-emissive cathodes
- H01J 3/022: {with microengineered cathode, e.g. Spindt-type}
- H01J 9/025: {of field emission cathodes}
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10K 71/12: using liquid deposition, e.g. spin coating
- H10K 85/221: {Carbon nanotubes}
- H10W 20/045: {for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/4462: {Carbon or carbon-containing materials, e.g. graphene}
- C01B 2202/34: Length
- C01B 2202/36: Diameter
- H01J 2201/30469: Carbon nanotubes (CNTs)
- H01J 2237/31786: Field-emitting cathode
- H10K 10/462: {Insulated gate field-effect transistors [IGFETs]}
- H10K 85/615: {Polycyclic condensed aromatic hydrocarbons, e.g. anthracene}
- H10W 20/0425: {comprising multiple stacked seed or nucleation layers}
- H10W 20/0554: {of nanotubes or nanowires}
- Y10S 977/734: Fullerenes, i.e. graphene-based structures, such as nanohorns, nanococoons, nanoscrolls or fullerene-like structures, e.g. WS2 or MoS2 chalcogenide nanotubes, planar C3N4, etc.
- Y10S 977/742: Carbon nanotubes, CNTs
- Y10S 977/75: Single-walled
- Y10S 977/814: Group IV based elements and compounds, e.g. CxSiyGez, porous silicon
- Y10S 977/842: for carbon nanotubes or fullerenes
- Y10S 977/86: Scanning probe structure
- B01J: CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- C01B: NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; {METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C}
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- D01F: CHEMICAL FEATURES IN THE MANUFACTURE OF ARTIFICIAL FILAMENTS, THREADS, FIBRES, BRISTLES OR RIBBONS; APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OF CARBON FILAMENTS
- H01B: CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES (selection for magnetic properties H01F1/00; waveguides H01P {; printed circuits H05K})
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

The present invention provides for nanostructures grown on a conducting or insulating substrate, and a method of making the same. The nanostructures grown according to the claimed method are suitable for interconnects and/or as heat dissipators in electronic devices.

## Claims

### Claim 1

An integrated circuit, comprising:
a support;
a conducting substrate, on the support;
an interconnect supported by the conducting substrate, wherein the interconnect comprises at least one nanostructure, and wherein the nanostructure comprises:
a plurality of intermediate layers on the conducting substrate, wherein at least two of the plurality of intermediate layers are interdiffused, and wherein material of the at least two of the plurality of intermediate layers that are interdiffused are present in the nanostructure, the plurality of intermediate layers including at least one layer that affects a morphology of the nanostructure and at least one layer that affects an electrical property of an interface between the conducting substrate and the nanostructure, and wherein at least one of the plurality of intermediate layers comprises material selected from the group consisting of amorphous silicon and germanium.

### Claim 2 (depends on 1)

The integrated circuit of claim 1 wherein the conducting substrate comprises a metal.

### Claim 3 (depends on 2)

The integrated circuit of claim 2 wherein the metal is selected from the group consisting of tungsten, molybdenum, niobium, platinum and palladium.

### Claim 4 (depends on 1)

The integrated circuit of claim 1 wherein the plurality of intermediate layers comprises a metal layer, a catalyst layer, and a layer of semiconducting material.

### Claim 5 (depends on 4)

The integrated circuit of claim 4 wherein the layer of semiconducting material is amorphous silicon, or amorphous germanium.

### Claim 6 (depends on 4)

The integrated circuit of claim 4, wherein the layer of semiconducting material is a layer of amorphous silicon, wherein the layer of amorphous silicon, the layer of catalyst, and at least one of the plurality of intermediate layers have interdiffused with each other, and wherein the layer of amorphous silicon, the layer of catalyst, and the at least one of the plurality of intermediate layers that are interdiffused are present in the nanostructure.

### Claim 7 (depends on 6)

The integrated circuit of claim 6, wherein the nanostructure has a tip and a base, and wherein the layer of amorphous silicon, the layer of catalyst, and the at least one of the plurality of intermediate layers that are interdiffused are present both at the tip and at the base of the nanostructure.

### Claim 8 (depends on 4)

The integrated circuit of claim 4, wherein at least one of the plurality of intermediate layers has interdiffused into the metal layer and into the layer of semiconducting material, and wherein the catalyst layer, the metal layer, and the layer of semiconducting material that are interdiffused are present in the nanostructure.

### Claim 9 (depends on 8)

The integrated circuit of claim 8, wherein the nanostructure has a tip and a base, and wherein the layer of catalyst, the metal layer, and the layer of semiconducting material that are interdiffused are present both at the tip and at the base of the nanostructure.

### Claim 10 (depends on 1)

The integrated circuit of claim 1, wherein the nanostructure is a carbon nanostructure.

### Claim 11 (depends on 1)

The integrated circuit of claim 1, wherein the nanostructure comprises a bundle of carbon nanostructures.

### Claim 12 (depends on 1)

The integrated circuit of claim 1, wherein the nanostructure is made from a compound selected from the group consisting of: InP, GaAs, and AlGaAs.

### Claim 13 (depends on 1)

The integrated circuit of claim 1, wherein the plurality of intermediate layers form an Ohmic contact.

### Claim 14 (depends on 1)

The integrated circuit of claim 1, wherein the plurality of intermediate layers form a Schottky barrier.

### Claim 15 (depends on 1)

The integrated circuit of claim 1, wherein the support is a wafer of silicon, or oxidized silicon.

### Claim 16 (depends on 1)

The integrated circuit of claim 1, wherein the plurality of intermediate layers is between 1 nm and 1 μm thick.

### Claim 17 (depends on 1)

The integrated circuit of claim 1, wherein the plurality of intermediate layers adjacent to the nanostructure include a layer of catalyst, and wherein the catalyst is selected from the group consisting of: Ni, Fe, Mo, NiCr, and Pd.

### Claim 18 (depends on 17)

The integrated circuit of claim 17, wherein the layer of catalyst has interdiffused with at least one of the plurality of intermediate layers, and wherein the layer of catalyst and the at least one of the plurality of intermediate layers that are interdiffused are present in the nanostructure.

### Claim 19 (depends on 18)

The integrated circuit of claim 18, wherein the nanostructure has a tip and a base, and wherein the layer of catalyst and the at least one of the plurality of intermediate layers that are interdiffiased are present both at the tip and at the base of the nanostructure.

### Claim 20 (depends on 1)

The integrated circuit of claim 1, further comprising a plurality of nanostructures.

### Claim 21 (depends on 1)

The integrated circuit of claim 1, further comprising at least one nanostructure configured to dissipate heat from the circuit.

### Claim 22 (depends on 1)

The integrated circuit of claim 1 wherein the plurality of intermediate layers comprises:
a first control layer disposed on the conducting substrate;
a metal/semi-metal layer disposed on the first control layer, wherein the first control layer controls diffusion from the metal/semi-metal layer into the conducting substrate;
a second control layer disposed on the metal/semi-metal layer; and
one or more layers disposed on the second control layer.

### Claim 23 (depends on 22)

The integrated circuit of claim 22 wherein the first control layer comprises material selected from the group consisting of Ta, Ti, TiN, SiNx, SiOx, and Al2O3.

### Claim 24 (depends on 22)

The integrated circuit of claim 22 wherein the second control layer comprises high k dielectric material.

### Claim 25 (depends on 24)

The integrated circuit of claim 24 wherein the second control layer comprises material selected from the group consisting of ZrOx, HfOx, SiNx, Ta2O5, Al2O3, and TiO2.

### Claim 26

An integrated circuit comprising:
at least one interconnect comprising a carbon nanostructure, wherein the integrated circuit permits a current density of ≧107 A/cm2 when a current is flowing through it, wherein the carbon nanostructure comprises:
a plurality of intermediate layers on a conducting substrate, wherein at least two of the plurality of intermediate layers are interdiffused, and wherein material of the at least two of the plurality of intermediate layers that are interdiffused are present in the nanostructure, the plurality of intermediate layers including at least one layer that affects a morphology of the nanostructure and at least one layer that affects an electrical property of an interface between the conducting substrate and the nanostructure, and wherein at least one of the plurality of intermediate layers comprises material selected from the group consisting of amorphous silicon and germanium.
