Programmable memory repair scheme
AssigneeRambus Inc.
InventorsAdrian E. Ong, Fan Ho
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Abstract
The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a repair circuit. The data storage elements include primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations. The repair circuit is programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements and the programmed repair circuit is configured to reroute memory access from a primary data storage element having the recognized malfunctioning address to a corresponding redundant data storage element.
Claims34
A semiconductor memory device, comprising:
- a plurality of data storage elements including primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations;
- and
- a repair circuit including one or more address matching registers programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements.
A system, comprising:
- a first integrated circuit including a memory controller unit;
- and
- a second integrated circuit including a semiconductor memory device controlled by the first integrated circuit to perform memory access operations, the memory device including a plurality of data storage elements and a repair circuit, the data storage elements including primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for the memory access operations, the repair circuit including address matching registers that are programmable by the first integrated circuit to recognize an address of one or more malfunctioning primary data storage elements, wherein the first integrated circuit programs the address matching registers by sending the address of the one or more malfunctioning primary data storage elements to the memory device, the address of the one or more malfunctioning primary data storage elements being stored in a nonvolatile memory.
A method performed by an integrated circuit coupled to a memory device, the method comprising:
- storing a repair address in a non-volatile memory, the repair address indicating one or more malfunctioning primary data storage elements in the memory device;
- in a memory setup mode, programming a number of address matching registers residing in the memory device based on the stored repair address such that the address matching registers are configured to recognize the repair address;
- and
- exiting the memory setup mode to allow the memory device to perform the memory access operations.
A method, comprising:
- testing a memory device, the test identifying one or more malfunctioning primary data storage elements;
- storing a repair address corresponding to the malfunctioning primary data storage elements in a non-volatile memory located on a memory controller;
- and
- programming a number of address matching registers located on the memory device based on the stored address information in preparation for the memory access operations, wherein the programmed address matching registers are configured to recognize the repair address.
A system, comprising:
- a first integrated circuit device having a memory setup function and a non-volatile memory, wherein the non-volatile memory is configured to store a repair address;
- and
- a second integrated circuit device connected to the first integrated circuit device and including a memory device having a plurality of data storage elements and a repair circuit, the data storage elements including primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations, the repair circuit including one or more address matching registers being programmable by the memory setup function of the first integrated circuit device based on the stored repair address after powering up the second integrated circuit.
A method, comprising:
- testing a memory device to identify one or more malfunctioning primary data storage elements;
- storing at least one repair address corresponding to the malfunctioning primary data storage elements in a non-volatile memory located on an integrated circuit device different from the memory device;
- and
- enabling a memory setup function in the integrated circuit device to program a memory repair circuit including one or more address matching registers located on the memory device based on the stored repair address in preparation for memory access operations.
Dependencies are inferred from the claim text.