Method and apparatus for storing and distributing memory repair information
AssigneeMentor Graphics Corporation
InventorsBenoit Nadeau-Dostie, Jean-François Coté
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AssigneeMentor Graphics Corporation
InventorsBenoit Nadeau-Dostie, Jean-François Coté
Estimating the term…
A system for repairing embedded memories on an integrated circuit includes an external Built-In Self-repair Register (BISR) associated with every reparable memory. Each BISR is serially configured in a daisy chain with a fuse box controller. The controller determines the daisy chain length upon power up. The controller may perform a corresponding number of shift operations to move repair data between BISRs and a fuse box. Memories can have a parallel or serial repair interface. The BISRs may have a repair analysis facility into which fuse data may be dumped and uploaded to the fuse box or downloaded to repair the memory. Pre-designed circuit blocks provide daisy chain inputs and access ports to effect the system or to bypass the circuit block.
A system for repairing at least one embedded memory on an integrated circuit, the system comprising:
Dependencies are inferred from the claim text.