Analog to digital converter using asynchronous pulse technology
AssigneeHRL Laboratories, LLC
InventorsJose Cruz-Albrecht, Peter Petre, Joseph F. Jensen
Life of this patent
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Abstract
A digital to analog converter includes a time encoder that converts an analog input signal into a asynchronous pulse sequence, a pulse asynchronous DeMUX circuit that converts the asynchronous pulse sequence into a parallel stream of pulse sequences at a relatively lower speed, a parallel pulse to asynchronous digital converter, an asynchronous digital to synchronous digital converter, a timing reference circuit to generate absolute time references, and a Digital Signal Processor. This architecture provides for analog to digital conversion based on pulse encoding with a parallel digitization scheme of the pulse encoded signal.
Claims2
A time-encoder comprising:
- a transconductance amplifier having differential outputs;
- a passive differential filter coupled to the differential outputs of the transconductance amplifier;
- a differential hysteresis quantizer coupled to the passive differential filter;
- and
- a differential 1-bit feedback DAC having differential inputs coupled to the differential hysteresis quantizer and having differential outputs coupled to the passive differential filter.
A differential-input differential-output hysteresis quantizer comprising:
- a first differential transistor pair which are linearized, have differential inputs coupled to hysteresis quantizer inputs, and have differential outputs connected to a load resistor and emitter follower transistors;
- a second differential transistor pair which are non-linearized, have differential inputs driven by the output of the first differential transistor pair via the emitter follower transistors, with local cross-coupled positive feedback from differential outputs of the second differential transistor pair to its differential inputs via said emitter follower transistors;
- and
- a third differential transistor pair which are non-linearized, have differential inputs driven by the output of the first differential pair via the emitter follower transistors, and have differential outputs providing differential outputs of the hysteresis quantizer.
Dependencies are inferred from the claim text.