# US 7,746,393 B2 · Image signal processor and deficient pixel detection method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,746,393 B2 - Document ID: US7746393B2 - Status: Granted - Kind: B2 - Application number: 11/426,759 - Filed: 2006-06-27 - Published: 2006-10-19 - Granted: 2010-06-29 - Earliest claimed: 1999-10-27 - Assignees: Sanyo Electric Co., Ltd. - Inventors: Tohru Watanabe - Web page: https://patentgrep.com/patent/US7746393B2 ## CPC - G09G 3/006: {Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309)} - G06T 5/20: using local operators - G06T 5/77: Retouching; Inpainting; Scratch removal - G06T 7/0002: {Inspection of images, e.g. flaw detection} - H04N 5/21: Circuitry for suppressing or minimising disturbance, e.g. moiré or halo - H04N 25/683: by defect estimation performed on the scene signal, e.g. real time or on the fly detection - H10F 39/80: {Constructional details of image sensors} - H10F 39/8023: {Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery} - G09G 2330/10: Dealing with defective pixels - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract A deficiency candidate detection circuit detects a deficient pixel candidate by comparing the image signal of a target pixel with the image signals of peripheral pixels, and address information of the deficient pixel candidate is stored in a position memory circuit. A deficiency determining circuit repeats the determination of a deficient pixel a number of times based on the address information stored in the position memory circuit, and determines address information of a deficient pixel from the continuity of the determination results. A deficiency registering circuit registers the determined address information in the position memory circuit. A deficiency correction circuit corrects the image signal of the deficient pixel according to the registered address information of the deficient pixel. ## Claims ### Claim 1 An image signal processor for processing a plurality of image signals associated with a plurality of screens, comprising: an image memory circuit for storing a signal corresponding to a target pixel and signals corresponding to a plurality of peripheral pixels adjacent to the target pixel; a deficiency candidate detection circuit for comparing the signal corresponding to the target pixel with a threshold value calculated from the signals corresponding to the plurality of peripheral pixels to detect a deficient pixel candidate and for generating a comparison result; a deficiency determining circuit for determining a deficient pixel according to a continuity of the deficient pixel candidate based on a plurality of comparison results produced by the deficiency candidate detection circuit over the plurality of screens; a position memory circuit for storing deficiency information for a position of the deficient pixel; and a deficiency correction circuit for correcting the signal corresponding to the target pixel, which is deficient, in accordance with the deficiency information; wherein the position memory circuit comprises: a first memory for temporarily storing position information for the deficient pixel and a result of detection by the deficiency candidate detection circuit; and a non-volatile second memory for storing position information for the deficient pixel read from the first memory. ### Claim 2 (depends on 1) The image signal processor according to claim 1, wherein one of the first memory and the non-volatile second memory is configured to store a level of the deficient pixel and position information of the deficient pixel. ### Claim 3 (depends on 2) The image signal processor according to claim 2, wherein one of the first memory and the non-volatile second memory is configured to store, by priority, the level of the deficient pixel. ### Claim 4 (depends on 3) The image signal processor of claim 3, wherein the level of the deficient pixel exceeds a level, thereby indicating a highly-deficient pixel. ### Claim 5 (depends on 1) The image signal processor according to claim 1, wherein the deficiency determining circuit is configured to determine a deficient pixel for each of a plurality of areas of a screen. ### Claim 6 (depends on 5) The image signal processor according to claim 5, wherein the deficiency determining circuit is configured to determine a deficient pixel repeatedly in a time division multiplexed manner for each of the plurality of areas. ### Claim 7 (depends on 1) The image signal processor according to claim 1, wherein the deficiency determining circuit shares part of the deficiency candidate detection circuit. ### Claim 8 (depends on 1) The image signal processor of claim 1, wherein the deficiency candidate detection circuit is connected to the image memory circuit. ### Claim 9 (depends on 1) The image signal processor of claim 1, wherein the deficiency determining circuit is connected to the deficiency candidate detection circuit. ### Claim 10 (depends on 1) The image signal processor of claim 1, wherein the position memory circuit is connected to the deficiency determining circuit. ### Claim 11 (depends on 1) The image signal processor of claim 1, wherein the deficiency correction circuit is connected to the position memory circuit. ### Claim 12 (depends on 1) The image signal processor of claim 1, wherein: the deficiency candidate detection circuit is connected to the image memory circuit; the deficiency determining circuit is connected to the deficiency candidate detection circuit; the position memory circuit is connected to the deficiency determining circuit; and the deficiency correction circuit is connected to the position memory circuit.