# US 7,746,354 B2 · Graphics display system with anti-aliased text and graphics feature

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- Number: US 7,746,354 B2
- Document ID: US7746354B2
- Status: Granted
- Kind: B2
- Application number: 11/617,468
- Filed: 2006-12-28
- Published: 2007-05-10
- Granted: 2010-06-29
- Earliest claimed: 1998-11-09
- Assignees: Broadcom Corporation
- Inventors: Alexander G. MacInnis; Chengfuh Jeffrey Tang; Xiaodong Xie; James T. Patterson; Greg A. Kranawetter
- Web page: https://patentgrep.com/patent/US7746354B2

## CPC

- G06F 3/0611: {in relation to response time}
- G06F 3/0653: {Monitoring storage devices or systems}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0683: {Plurality of storage devices}
- G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining
- G06T 1/60: Memory management
- G06T 9/00: Image coding (bandwidth or redundancy reduction for static pictures H04N1/41; coding or decoding of static colour picture signals H04N1/64; methods or arrangements for coding, decoding, compressing or decompressing digital video signals H04N19/00)
- G06T 9/007: {Transform coding, e.g. discrete cosine transform}
- G09G 5/001: {Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor}
- G09G 5/06: using colour palettes, e.g. look-up tables
- G09G 5/12: Synchronisation between the display unit and other units, e.g. other display units, video-disc players
- G09G 5/14: Display of multiple viewports
- G09G 5/28: for enhancement of character form, e.g. smoothing
- G09G 5/346: {for systems having a bit-mapped display memory}
- G09G 5/36: characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G 5/363: {Graphics controllers}
- H04N 5/04: Synchronising (for television systems using pulse code modulation H04N7/56)
- H04N 5/14: Picture signal circuitry for video frequency region (cameras or camera modules comprising electronic image sensors, or control thereof H04N23/00)
- H04N 5/44504: {Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits}
- H04N 5/45: Picture in picture {, e.g. displaying simultaneously another television channel in a region of the screen}
- H04N 7/0122: {the input and the output signals having different aspect ratios}
- H04N 7/0135: {involving interpolation processes (interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59)}
- H04N 9/45: Generation or recovery of colour sub-carriers
- H04N 9/641: {Multi-purpose receivers, e.g. for auxiliary information (H04N9/642 takes precedence)}
- H04N 9/642: {Multi-standard receivers}
- H04N 19/42: characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation (H04N19/635 takes precedence)
- H04N 19/423: characterised by memory arrangements (H04N19/433 takes precedence)
- H04N 19/436: using parallelised computational arrangements
- H04N 19/44: Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
- H04N 19/59: involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
- H04N 19/61: in combination with predictive coding
- H04N 21/42204: {User interfaces specially adapted for controlling a client device through a remote control device; Remote control devices therefor (constructive details of casings for the remote control device H01H9/0235; user interfaces for controlling a tuning device of a television receiver through a remote control H03J9/00; remote control of peripheral devices connected to a television receiver through the remote control device of the television receiver H04B1/205)}
- H04N 21/42653: {for processing graphics}
- H04N 21/4305: {Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets (arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083)}
- H04N 21/4316: {for displaying supplemental content in a region of the screen, e.g. an advertisement in a separate window}
- H04N 21/434: Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream {(demultiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00)}
- H04N 21/440263: {by altering the spatial resolution, e.g. for displaying on a connected PDA}
- H04N 21/4438: {Window management, e.g. event handling following interaction with the user interface}
- H04N 21/47: End-user applications
- G09G 5/02: characterised by the way in which colour is displayed {(details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607)}
- G09G 5/024: {using colour registers, e.g. to control background, foreground, surface filling (G09G5/06 takes precedence)}
- G09G 5/026: {Control of mixing and/or overlay of colours in general (G09G5/022 and G09G5/024 take precedence)}
- G09G 2310/0224: Details of interlacing
- G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
- G09G 2340/02: Handling of images in compressed format, e.g. JPEG, MPEG
- G09G 2340/0407: Resolution change, inclusive of the use of different resolutions for different screen areas
- G09G 2340/10: Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
- G09G 2340/125: wherein one of the images is motion video
- G09G 2360/02: Graphics controller able to handle multiple formats, e.g. input or output formats
- G09G 2360/121: using a cache memory
- G09G 2360/125: using unified memory architecture [UMA]
- G09G 2360/126: The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
- G09G 2360/128: Frame memory using a Synchronous Dynamic RAM [SDRAM]
- H04N 5/126: {whereby the synchronisation signal indirectly commands a frequency generator}
- H04N 5/46: for receiving on more than one standard at will (deflecting circuits of multi-standard receivers H04N3/27)
- H04N 11/143: {Encoding means therefor (H04N11/16 takes precedence)}
- H04N 11/20: Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
- H04N 21/426: Internal components of the client {; Characteristics thereof} (H04N5/44 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The system may use anti-aliased text and graphics to provide high quality display of graphical elements, or glyphs, which represent an image of a character of text or graphics, on television and other displays. The graphical elements may be superimposed over live video or arbitrary graphics imagery.

## Claims

### Claim 1

A method of displaying a graphical element comprising:
reducing a gray level of multi-level values by at least one bit;
alpha blending using the reduced multi-level values as alpha blend values; and
filtering the graphical element with a box filter to generate a multi-level value per pixel at the intended final display resolution.

### Claim 2 (depends on 1)

The method of claim 1, wherein reduced multi-level values are written into a display buffer where the reduced multi-level values are used as the alpha blend values when contents of the display buffer are composited with other graphics and video images.

### Claim 3 (depends on 1)

The method of claim 1, wherein the graphical element is initially rendered at a higher resolution than an intended final display resolution.

### Claim 4 (depends on 3)

The method of claim 3, wherein the graphical element is initially rendered at four times the resolution of the intended final display resolution in at least a horizontal direction.

### Claim 5 (depends on 3)

The method of claim 3, wherein the graphical element is initially rendered at four times the resolution of the intended final display resolution in at least a vertical direction.

### Claim 6

A graphics display system for displaying a graphical element comprising:
a display engine for reducing a gray level of multi-level values and for compositing the graphical element with at least one graphics image using the reduced multi-level values as alpha blend values,
wherein generation of the multi-level values do not depend on alpha blend values that existed prior to filtering.

### Claim 7 (depends on 6)

The graphics display system of claim 6 wherein the graphical element is initially rendered at a higher resolution than an intended final display resolution.

### Claim 8 (depends on 6)

The graphics display system of claim 6, further comprising:
a box filter for filtering the graphical element to generate the multi-level values, one multi-level value per each pixel, at the intended final display resolution.

### Claim 9 (depends on 8)

The graphics display system of claim 8 wherein the graphical element has a plurality of foreground colors, which are filtered using the box filter.

### Claim 10 (depends on 9)

The graphics display system of claim 9 wherein the filtered plurality of foreground colors are used as color choices in a CLUT format.

### Claim 11 (depends on 9)

The graphics display system of claim 9 wherein the filtered plurality of foreground colors are used as color portions of pixels having a color portion and an alpha portion.

### Claim 12 (depends on 11)

The graphics display system of claim 11 wherein the pixels having a color portion and an alpha portion are in an alphaRGB format.

### Claim 13 (depends on 11)

The graphics display system of claim 11 wherein the pixels having a color portion and an alpha portion are in an alphaYUV format.

### Claim 14 (depends on 6)

The graphics display system of claim 6 wherein the alpha blend values include CLUT indexes, each CLUT index is associated with a CLUT entry, and each CLUT entry contains a CLUT alpha blend value.

### Claim 15 (depends on 6)

The graphics display system of claim 6 wherein the alpha blend values are used to form alpha portions of pixels having a color portion and an alpha portion.

### Claim 16 (depends on 15)

The graphics display system of claim 15 wherein pixels having a color portion and an alpha portion are in an alphaRGB (4,4,4,4) format.