# US 7,746,350 B1 · Cryptographic computations on general purpose graphics processing units

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- Number: US 7,746,350 B1
- Document ID: US7746350B1
- Status: Granted
- Kind: B1
- Application number: 11/454,765
- Filed: 2006-06-15
- Granted: 2010-06-29
- Earliest claimed: 2006-06-15
- Assignees: NVIDIA Corporation
- Inventors: Radoslav Danilak
- Web page: https://patentgrep.com/patent/US7746350B1

## CPC

- G06F 9/24: Loading of the microprogram
- G06F 9/3851: {from multiple instruction streams, e.g. multistreaming}
- G06F 9/3879: {for non-native instruction execution, e.g. executing a command; for Java instruction set}
- G06F 9/3885: {using a plurality of independent parallel functional units}
- G06F 9/3888: {controlled by a single instruction for multiple threads [SIMT] in parallel}
- G06F 21/72: in cryptographic circuits
- G09C 1/00: Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00)
- H04L 9/0631: {Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms}
- H04L 2209/043: of tables, e.g. lookup, substitution or mapping
- H04L 2209/12: Details relating to cryptographic hardware or logic circuitry
- H04L 2209/24: Key scheduling, i.e. generating round keys or sub-keys for block encryption
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G09C: CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

One embodiment of the invention sets forth a computing system for performing cryptographic computations. The computing system comprises a central processing unit, a graphics processing unit, and a driver. The central processing requests a cryptographic computation. In response, the driver downloads microcode to perform the cryptographic computation to the graphics processing unit and the graphics processing unit executes microcode. This offloads cryptographic computations from the CPU. As a result, cryptographic computations are performed faster and more efficiently on the GPU, freeing resources on the CPU for other tasks.

## Claims

### Claim 1

A computing system for performing a cryptographic computation, the computing system comprising:
a system memory configured to store microcode corresponding to the cryptographic computation;
a central processing unit (CPU) coupled to the system memory; and
a graphics processing unit (GPU) including one or more streaming multiprocessors and configured to:
receive commands associated with the cryptographic computation from the CPU, wherein the commands are included in a compute class that includes instructions that provide support for integer arithmetic,
receive the microcode corresponding to the cryptographic computation from the system memory via the CPU, wherein the microcode is configured to implement the commands included in the compute class, and
perform the cryptographic computation by executing the microcode, wherein the one or more streaming multiprocessors execute the microcode.

### Claim 2 (depends on 1)

The computing system of claim 1, wherein the one or more streaming multiprocessors are further configured to perform a plurality of integer and logical operations when performing the cryptographic computation.

### Claim 3 (depends on 1)

The computing system of claim 1, wherein a driver executing on the CPU is configured to transmit the commands to the GPU and is further configured to divide the commands into batches.

### Claim 4 (depends on 3)

The computing system of claim 3, wherein a number of commands included in each batch is determined based on at least one factor selected from the following: a CPU speed, a number of the one or more streaming multiprocessors, and a number of threads executing per streaming multiprocessor.

### Claim 5 (depends on 1)

The computing system of claim 1, wherein the cryptographic computation is for encrypting at least one payload of data using an advanced encryption standard (AES) algorithm.

### Claim 6 (depends on 5)

The computing system of claim 5, wherein a plurality of thread groups execute on the GPU, each thread group comprises 16 threads and each thread is capable of encrypting one of sixteen elements of a 4×4 input state.

### Claim 7 (depends on 5)

The computing system of claim 5, further comprising a pre-computed table stored in a memory, the pre-computed table replacing a plurality of S-box lookups, a plurality of GF multiplications, and a plurality of row and column mixing.

### Claim 8 (depends on 7)

The computing system of claim 7, wherein for each of the 16 elements of a 4×4 input state, the results of the S-box lookups and GF multiplications are pre-computed.

### Claim 9 (depends on 7)

The computing system of claim 7, further comprising a one-byte index to read a word from the pre-computed table, the word comprising pre-computed values for four state elements.

### Claim 10

A method for performing a cryptographic computation, the method comprising:
receiving commands associated with the cryptographic computation from a central processing unit (CPU), wherein the commands are included in a compute class that includes instructions that provide support for integer arithmetic;
receiving microcode associated with the cryptographic computation from a system memory via the CPU, wherein the microcode is configured to implement the commands included in the compute class; and
performing the cryptographic computation by executing the microcode on one or more streaming multiprocessors that are not included in the CPU.

### Claim 11 (depends on 10)

The method of claim 10, wherein the step of performing the cryptographic computation includes performing a plurality of integer and logical operations.

### Claim 12 (depends on 10)

The method of claim 10, further comprising the step of dividing the commands into batches.

### Claim 13 (depends on 12)

The method of claim 12, wherein a number of commands included in each batch is determined based on at least one factor selected from the following: a CPU speed, a number of the one or more streaming multiprocessors, and a number of threads executing per streaming multiprocessor.

### Claim 14 (depends on 10)

The method of claim 10, wherein the cryptographic computation is for encrypting at least one payload of data using an advanced encryption standard (AES) algorithm.

### Claim 15 (depends on 14)

The method of claim 14, wherein a plurality of thread groups execute the microcode, each thread group comprises 16 threads and each thread is capable of encrypting one of sixteen elements of a 4×4 input state.

### Claim 16 (depends on 14)

The method of claim 14, wherein a pre-computed table replaces a plurality of S-box lookups, a plurality of GF multiplications, and a plurality of row and column mixing.

### Claim 17 (depends on 16)

The method of claim 16, wherein for each of the 16 elements of a 4×4 input state, the results of the S-box lookups and GF multiplications are pre-computed.

### Claim 18 (depends on 16)

The method of claim 16, further comprising a one-byte index to read a word from the pre-computed table, the word comprising pre-computed values for four state elements.