# US 7,746,258 B2 · Digital-analog converter and camera module having the same

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- Number: US 7,746,258 B2
- Document ID: US7746258B2
- Status: Granted
- Kind: B2
- Application number: 11/997,698
- Filed: 2007-08-14
- Published: 2009-06-04
- Granted: 2010-06-29
- Earliest claimed: 2006-08-16
- Assignees: LG Innotek Co., Ltd.
- Inventors: Cheong Yong Park
- Web page: https://patentgrep.com/patent/US7746258B2

## CPC

- H03M 1/687: {Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type}
- H03M 1/682: {both converters being of the unary decoded type}
- H03M 1/685: {the quantisation value generators of both converters being arranged in a common two-dimensional array}
- H03M 1/745: {with weighted currents}
- H03M 1/747: {with equal currents which are switched by unary decoded digital signals}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

Disclosed are a digital-analog converter and a camera module having the same. The digital-analog converter includes a plurality of decoders for receiving bits of a digital input signal by dividing the bits in a predetermined bit unit except for lower bits of the digital input signal, and decoding the bits into thermometer code signals, a delay unit for delaying output of the lower bits of the digital input signal, a latch unit for synchronizing output signals of the decoders with an output signal of the delay unit, and a current source for converting a digital signal output from the latch unit into an analog signal.

## Claims

### Claim 1

A digital-analog converter comprising:
a plurality of thermometer decoders including a first thermometer decoder for converting upper bits of a digital input signal into thermometer code signals except for the lower bits of the digital input signal, and a second thermometer decoder for converting intermediate bits into thermometer code signals except for the upper bits and the lower bits of the digital input signal;
a delay unit for delaying output of the lower bits of the digital input signal;
a plurality of latch units including a first latch unit for synchronizing the thermometer code signals of the first thermometer decoder, a second latch unit for synchronizing the thermometer code signals of the second thermometer decoder, and a third latch unit for synchronizing the thermometer code signals of the thermometer decoders with an output code signal of the delay unit;
a plurality of current sources including a first current source for converting the thermometer code signals outputted from the first latch unit into an analog signal, a second current source for converting the thermometer code signals outputted from the second latch unit into an analog signal, and a third current source for converting the output code signals outputted from the third latch unit into an analog signal; and
a voltage converter to convert the analog signal outputted from the first to third current sources into a voltage level,
wherein at least one of the first thermometer decoder and the second thermometer decoder includes a row thermometer decoder and a column thermometer decoder.

### Claim 2 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein the first thermometer decoder includes the row thermometer decoder and the column thermometer decoder to decode input bits by dividing the upper bits by a half.

### Claim 3 (depends on 2)

The digital-analog converter as claimed in claim 2, wherein the first latch unit includes a fourth latch unit to receive thermometer code signal of the row thermometer decoder; and a fifth latch unit to receive the thermometer code signals of the column thermometer decoder.

### Claim 4 (depends on 3)

The digital-analog converter as claimed in claim 3, wherein the first current source outputs a different analog signal having (2 upper bits)-step and has a current source matrix structure.

### Claim 5 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein a number of upper bits is larger than a number of the lower bits or the intermediate bits.

### Claim 6 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein the first thermometer decoder and the second thermometer decoder receive the bits, which are divided by a same bit number.

### Claim 7 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein the first thermometer decoder and the second thermometer decoder receive the bits, which are divided by a different bit numbers.

### Claim 8 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein the digital input signal comprises at least 10 bits.

### Claim 9 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein a ratio of the bits, which are input into the decoders and the delay unit, is one of 4:1, 7:3, and 3:2.

### Claim 10 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein a ratio (X:Y:Z) of the upper bits, the intermediate bits, and the lower bits is one of 3:1:1, 2:2:1, X:(X−1):(X−1), X:(X+1):X, X:(X−1):X, and X:(X/2):X.

### Claim 11 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein one of a number of the upper bits and a number of the intermediate bits is equal to a number of the lower bits.

### Claim 12 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein the first to third latch units synchronize the digital code signals of the thermometer decoders and the delay unit with a predetermined clock.

### Claim 13 (depends on 1)

The digital-analog converter as claimed in claim 1, further comprising a buffer to perform a buffering operation with respect to a signal output from the first to third current sources.

### Claim 14 (depends on 1)

The digital-analog converter as claimed in claim 1, comprising a glitch suppressor to remove glitch noise of the code signals outputted from the latch unit.

### Claim 15 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein at least one of the thermometer code signals outputted from the thermometer decoders is a dummy code.

### Claim 16 (depends on 1)

The digital-analog converter as claimed in claim 1, wherein at least one of the first current source and the third current source outputs a differential analog signal.

### Claim 17 (depends on 16)

The digital-analog converter as claimed in claim 16, wherein the first to third current sources is outputted from the differential analog signal of the third current source corresponding to the lower bits.

### Claim 18

A camera module comprising:
a digital-analog converter; and
a motor driven by an analog signal output from the digital-analog converter,
wherein the digital-analog converter comprises:
a plurality of thermometer decoders including a first thermometer decoder for converting upper bits of a digital input signal into thermometer code signals except for the lower bits of the digital input signal, and a second thermometer decoder for converting intermediate bits into thermometer code signals except for the upper bits and the lower bits of the digital input signal;
a delay unit for delaying output of the lower bits of the digital input signal;
a plurality of latch units including a first latch unit for synchronizing the thermometer code signals of the first thermometer decoder, a second latch unit for synchronizing the thermometer code signals of the second thermometer decoder, and a third latch unit for synchronizing the thermometer code signals of the thermometer decoders with an output code signals of the delay unit;
a plurality of current sources including a first current source for converting the thermometer code signals outputted from the first latch unit into an analog signal, a second current source for converting the thermometer code signals outputted from the second latch unit into an analog signal, and a third current source for converting the output code signals outputted from the third latch unit into an analog signal; and
a voltage converter to convert the analog signal outputted from the first to third current sources into a voltage level,
wherein at least one of the first thermometer decoder and the second thermometer decoder includes a row thermometer decoder and a column thermometer decoder.

### Claim 19 (depends on 18)

The camera module as claimed in claim 18, wherein the motor comprises a voice coil motor (VCM).

### Claim 20 (depends on 18)

The digital-analog converter as claimed in claim 18, wherein at least one of the first thermometer decoder and the second thermometer decoder includes a row thermometer decoder and a column thermometer decoder;
and wherein the first latch unit includes a fourth latch unit to receive an input bit of the row thermometer decoder, and a fifth latch unit to receive an input bit of the column thermometer decoder.
