# US 7,746,232 B2 · Electronic substrate, semiconductor device, and electronic device

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- Number: US 7,746,232 B2
- Document ID: US7746232B2
- Status: Granted
- Kind: B2
- Application number: 11/712,361
- Filed: 2007-02-28
- Published: 2007-09-06
- Granted: 2010-06-29
- Earliest claimed: 2006-03-03
- Assignees: Seiko Epson Corporation
- Inventors: Nobuaki Hashimoto
- Web page: https://patentgrep.com/patent/US7746232B2

## CPC

- H01F 5/003: {Printed circuit coils}
- H01F 5/00: Coils (superconducting coils H01F6/06; fixed inductances of the signal type H01F17/00)
- H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package}
- H01Q 1/243: {with built-in antennas}
- H01Q 7/00: Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
- H01Q 21/28: Combinations of substantially independent non-interacting antenna units or systems {(multiple beam H01Q25/00)}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 90/293: {characterised by non-galvanic coupling between the chips, e.g. capacitive coupling}
- H01F 17/0006: {Printed inductances (printed coils for dynamo-electric machines H02K3/26; printed circuits H05K)}
- H01F 27/29: Terminals; Tapping arrangements {for signal inductances}
- H10W 20/49: Adaptable interconnections, e.g. fuses or antifuses
- H10W 44/248: {for antennas}
- H10W 70/656: Fan-in layouts
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/251: {Materials}
- H10W 72/922: {Bond pads being integral with underlying chip-level interconnections}
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/9445: {Top-view layouts, e.g. mirror arrays}
- H10W 90/00: Package configurations
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An electronic substrate including: a base substrate having an active face and a rear face; and a plurality of inductor elements formed on or above the active face, or formed on or above the rear face.

## Claims

### Claim 1

An electronic substrate comprising:
a base substrate having an active face and a rear face;
a passivation film formed on the active face of the base substrate;
a plurality of inductor elements formed on or above the active face, or formed on or above the rear face, and having a winding wire, the winding wire having an inner end and an outer end;
a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;
a first connecting wire formed on the passivation film and connected to the first electrode;
a dielectric layer formed between at least some of the inductor elements and the base substrate so as to cover the first connecting wire, including a through hole in which the inner end of the winding wire is connected to the first connecting wire; and
a second connecting wire connected to the outer end of the winding wire, connected to the second electrode, and formed on the dielectric layer.

### Claim 2 (depends on 1)

The electronic substrate according to claim 1, wherein
the inductor elements include:
a first inductor element; and
a second inductor element having an inductance value or an applicable frequency that are different from that of the first inductor element.

### Claim 3 (depends on 2)

The electronic substrate according to claim 2, wherein
the first inductor element is used for external power transmission, and the second inductor element is used for external communications.

### Claim 4 (depends on 2)

The electronic substrate according to claim 2, further comprising:
a connection terminal formed on the base substrate, used for external power transmission, wherein
the first inductor element and the second inductor element are used for external communications.

### Claim 5 (depends on 1)

The electronic substrate according to claim 1, wherein:
the dielectric layer is made of material having a dielectric dissipation factor smaller than that of the base substrate.

### Claim 6 (depends on 1)

The electronic substrate according to claim 1, wherein the inductor elements include:
a first inductor element; and
a second inductor element, wherein the number of turns in the winding wire of the second inductor element is more than that of the winding wire in the first inductor element.

### Claim 7

A semiconductor device, comprising:
a plurality of electronic substrates, each of which includes:
a base substrate having an active face and a rear face;
a passivation film formed on the active face of the base substrate:
a plurality of inductor elements formed on or above the active face, or on or above the rear face, and having a winding wire, the winding wire having an inner end and an outer end;
a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;
a first connecting wire formed on the passivation film and connected to the first electrode;
a dielectric layer formed between at least some of the inductor element and the base substrate so as to cover the first connecting wire, including a through hole in which the inner end of the winding wire is connected to the first connecting wire; and
a second connecting wire connected to the outer end of the winding wire, connected to the second electrode, and formed on the dielectric layer,
wherein the electronic substrates are disposed so as to be laminated, the inductor element functions as an antenna sending or receiving electromagnetic waves so as to send or receive signals between the electronic substrates.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein the inductor elements formed on a pair of the electronic substrates sending or receiving signals are disposed to face each other.