# US 7,746,058 B2 · Sequential equivalent—time sampling with an asynchronous reference clock

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,746,058 B2
- Document ID: US7746058B2
- Status: Granted
- Kind: B2
- Application number: 12/053,473
- Filed: 2008-03-21
- Published: 2009-09-24
- Granted: 2010-06-29
- Earliest claimed: 2008-03-21
- Assignees: Tektronix, Inc.
- Inventors: Michael A. Nelson; Pavel R. Zivny
- Web page: https://patentgrep.com/patent/US7746058B2

## CPC

- G01R 13/0218: {Circuits therefor}
- G01R 29/26: Measuring noise figure; Measuring signal-to-noise ratio
- G01R 31/31709: {Jitter measurements; Jitter generators (measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901)}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A sequential equivalent-time sampling oscilloscope simultaneously acquires samples of a signal-under-test and a reference clock that is asynchronous with the signal-under-test. The oscilloscope converts the samples of the reference clock into timestamps and uses the timestamps to compensate for the jitter of the oscilloscope and to indicate the absolute jitter of the signal-under-test.

## Claims

### Claim 1

A sequential equivalent-time sampling oscilloscope comprising: a first input for receiving a signal-under-test; a second input for receiving a trigger signal, the trigger signal being synchronous with the signal-under-test; a third input for receiving a reference clock, the reference clock being asynchronous with the signal-under-test; circuitry for simultaneously acquiring samples of the signal-under-test and samples of the reference clock in response to the trigger signal; circuitry for calculating sampled phases from the samples of the reference clock; circuitry for unwrapping the sampled phases into a sampled phase ramp; circuitry for generating an ideal phase ramp from the sampled phase ramp; and circuitry for subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.

### Claim 2 (depends on 1)

The oscilloscope of claim 1 further comprising circuitry for generating the equivalent-time waveform of the signal-under-test from the timestamps.

### Claim 3 (depends on 1)

The oscilloscope of claim 1 further comprising circuitry for determining the jitter of the signal-under-test from the timestamps relative to the reference clock.

### Claim 4

A method of sequential equivalent-time sampling comprising:
simultaneously acquiring samples of a signal-under-test and samples of a reference clock in response to a trigger signal, the trigger signal being synchronous with the signal-under-test, and the reference clock being asynchronous with the signal-under-test;
calculating sampled phases from the samples of the reference clock;
unwrapping the sampled phases into a sampled phase ramp;
generating an ideal phase ramp from the sampled phase ramp; and
subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.

### Claim 5 (depends on 4)

The method of claim 4 further comprising the step of generating the equivalent-time waveform of the signal-under-test from the timestamps.

### Claim 6 (depends on 4)

The method of claim 4 further comprising the step of determining the jitter of the signal-under-test from the timestamps relative to the reference clock.

### Claim 7

A sequential equivalent-time sampling oscilloscope comprising:
means for receiving a signal-under-test;
means for receiving a trigger signal, the trigger signal being synchronous with the signal-under-test;
means for receiving a reference clock, the reference clock being asynchronous with the signal-under-test;
means for simultaneously acquiring samples of the signal-under-test and samples of the reference clock in response to the trigger signal;
means for calculating sampled phases from the samples of the reference clock;
means for unwrapping the sampled phases into a sampled phase ramp;
means for generating an ideal phase ramp from the sampled phase ramp; and
means for subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.

### Claim 8 (depends on 7)

The oscilloscope of claim 7 further comprising means for generating the equivalent-time waveform of the signal-under-test from the timestamps.

### Claim 9 (depends on 7)

The oscilloscope of claim 7 further comprising means for determining the jitter of the signal-under-test from the timestamps relative to the reference clock.