# US 7,746,047 B2 · Low dropout voltage regulator with improved voltage controlled current source

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- Number: US 7,746,047 B2
- Document ID: US7746047B2
- Status: Granted
- Kind: B2
- Application number: 12/018,200
- Filed: 2008-01-23
- Published: 2008-11-20
- Granted: 2010-06-29
- Earliest claimed: 2007-05-15
- Assignees: Vimicro Corporation
- Inventors: Hang Yin; Zhao Wang
- Web page: https://patentgrep.com/patent/US7746047B2

## CPC

- G05F 1/575: characterised by the feedback circuit
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

## Abstract

Techniques pertaining to designs of a compensation voltage controlled current source (VCCS) used in low dropout voltage regulators are disclosed. According to one aspect of the present invention, a compensation voltage controlled current source (VCCS) is so designed to meet the low input/output voltage requirements. Various features of the VCCS are demonstrated through several embodiments.

## Claims

### Claim 1

A LDO voltage regulator comprising:
a differential amplifier circuit having a pair of input terminals and an output terminal, one input terminal coupled to a predetermined reference voltage;
an intermediate amplifier circuit having an output terminal and an input terminal coupled to the output terminal of the differential amplifier circuit; and
an output pass circuit including a pass transistor and an output capacitor, the pass transistor having a control terminal coupled to the output terminal of the intermediate amplifier circuit, an input terminal coupled to a power supply and an output terminal as a voltage output node, the output capacitor coupled between the voltage output node and a ground reference;
a feedback circuit including a pair of ladder resistors coupled in series between the voltage output node and the ground reference, a node between the ladder resistors coupled to the other input terminal of the differential amplifier circuit; and
a voltage controlled current source (VCCS) having an input terminal coupled to the voltage output node and an output terminal coupled to the node between the ladder resistors, wherein
the VCCS includes four NMOS field effect transistors MN1, MN2, MN3 and MN4, a current mirror and a compensation capacitor Cc, a gate electrode of the MN1 is coupled to a first predetermined voltage Vb1 and a source electrode of the MN1 is grounded, a gate electrode of the MN2 is coupled to the first predetermined voltage Vb1 and a source electrode of the MN2 is grounded, a gate electrode of the MN3 is coupled to a second predetermined voltage Vb2, a source electrode of the MN3 is coupled to a drain electrode of the MN1 and a drain electrode of the MN3 is coupled to an input terminal of the current mirror, a gate electrode of the MN4 is coupled to the second predetermined voltage Vb2, a source electrode of the MN4 is coupled to a drain electrode of the MN2 and a drain electrode of the MN4 is coupled to an output terminal of the current mirror, the drain electrode of the MN4 serves as the output terminal of the VCCS, one terminal of the compensation capacitor Cc is coupled to the drain electrode of the MN2 and the other terminal of the compensation capacitor Cc serves as the input terminal of the VCCS.

### Claim 2 (depends on 1)

The LDO voltage regulator according to claim 1, wherein the output pass circuit further comprises an output resistor coupled between the output terminal of the pass transistor and the voltage output node, and wherein the input terminal of the VCCS is coupled to a node between the pass transistor and the output resistor.

### Claim 3 (depends on 1)

The LDO voltage regulator according to claim 1, wherein the pass transistor is a P-type MOS field effect transistor, a gate electrode of the MOS field effect transistor serves as the control terminal, a source electrode of the MOS field effect transistor serves as the input terminal and a drain electrode of the MOS field effect transistor serves as the output terminal.

### Claim 4 (depends on 1)

The LDO voltage regulator according to claim 1, wherein the VCCS is designed for only injecting a small signal current into the node between the ladder resistors.

### Claim 5 (depends on 1)

The LDO voltage regulator according to claim 1, wherein a ratio of an input direct current to an output direct current of the current mirror is equal to (W/L)MN2/(W/L)MN1, (W/L)MN2 denotes a ratio of width to length of the MN2 and (W/L)MN1 denotes a ratio of width to length of the MN1, and wherein ratios of width to length of the MN3 and the MN4 satisfies (W/L)MN4/(W/L)MN3=(W/L)MN2/(W/L)MN1, (W/L)MN3 denotes a ratio of width to length of the MN3 and (W/L)MN4 denotes a ratio of width to length of the MN4.

### Claim 6 (depends on 1)

The LDO voltage regulator according to claim 1, wherein a transconductance gm4 between the drain electrode and the source electrode of the MN4 is an order of magnitude higher than an output resistor Ro2 of the MN2.

### Claim 7 (depends on 2)

The LDO voltage regulator according to claim 2, further comprising a load resistor coupled between the voltage output terminal and the ground reference.

### Claim 8 (depends on 7)

The LDO voltage regulator according to claim 7, wherein a resistance value of the output resistor is an order of magnitude less than that of the load resistor which is an order of magnitude less than that of either of the ladder resistors.

### Claim 9 (depends on 8)

The LDO voltage regulator according to claim 8, wherein a capacitance value of the compensation capacitor of the VCCS is an order of magnitude less than minimum capacitance value among an output capacitor of the differential amplifier circuit, an output capacitor of the intermediate amplifier circuit and the output capacitor of the output pass circuit.

### Claim 10 (depends on 9)

The LDO voltage regulator according to claim 9, wherein the LDO voltage regulator has a zero formed by the output capacitor and the output resistor of the output pass circuit.

### Claim 11 (depends on 1)

The LDO voltage regulator according to claim 1, wherein the output pass circuit further comprises another pass transistor coupled in series with the pass transistor and an output resistor, a control terminal of the another pass transistor is coupled to the output terminal of the intermediate amplifier circuit, an input terminal of the another pass transistor coupled to a power supply and an output terminal of the another pass transistor is coupled to one terminal of the output resistor, the other terminal of the output terminal is coupled to the voltage output node, and wherein the input terminal of the VCCS is coupled to a node between the another pass transistor and the output resistor.

### Claim 12 (depends on 11)

The LDO voltage regulator according to claim 11, wherein a ratio of width to length of the pass transistor is O, a ratio of width to length of the another pass transistor is P, then the ratio N of O to P is within 100˜1000.

### Claim 13

A voltage controlled current source (VCCS), comprising:
four NMOS field effect transistors MN1, MN2, MN3 and MN4, a current mirror and a compensation capacitor Cc, wherein
a gate electrode of the MN1 is coupled to a first predetermined voltage Vb1 and a source electrode of the MN1 is grounded, a gate electrode of the MN2 is coupled to the first predetermined voltage Vb1 and a source electrode of the MN2 is grounded, a gate electrode of the MN3 is coupled to a second predetermined voltage Vb2, a source electrode of the MN3 is coupled to a drain electrode of the MN1 and a drain electrode of the MN3 is coupled to an input terminal of the current mirror, a gate electrode of the MN4 is coupled to the second predetermined voltage Vb2, a source electrode of the MN4 is coupled to a drain electrode of the MN2 and a drain electrode of the MN4 is coupled to an output terminal of the current mirror, the drain electrode of the MN4 serves as an output terminal of the VCCS, one terminal of the compensation capacitor Cc is coupled to the drain electrode of the MN2 and the other terminal of the compensation capacitor Cc serves as an input terminal of the VCCS.

### Claim 14 (depends on 13)

The voltage controlled current source according to claim 13, wherein a ratio of an input direct current to an output direct current of the current mirror is equal to (W/L)MN2/(W/L)MN1, (W/L)MN2 denotes a ratio of width to length of the MN2 and (W/L)MN1 denotes a ratio of width to length of the MN1, and wherein ratios of width to length of the MN3 and the MN4 satisfies (W/L)MN4/(W/L)MN3=(W/L)MN2/(W/L)MN, (W/L)MN3 denotes a ratio of width to length of the MN3 and (W/L)MN4 denotes a ratio of width to length of the MN4.

### Claim 15 (depends on 13)

The voltage controlled current source according to claim 13, wherein a transconductance gm4 between the drain electrode and the source electrode of the MN4 is an order of magnitude higher than an output resistor Ro2 of the MN2.
