# US 7,745,943 B2 · Microelectonic packages and methods therefor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,745,943 B2 - Document ID: US7745943B2 - Status: Granted - Kind: B2 - Application number: 11/799,771 - Filed: 2007-05-03 - Published: 2007-09-06 - Granted: 2010-06-29 - Earliest claimed: 2004-06-25 - Assignees: Tessera, Inc. - Inventors: Belgacem Haba; Masud Beroz; Teck-Gyu Kang; Yoichi Kubota; Sridhar Krishnan; John B. Riley, III; Ilyas Mohammed - Web page: https://patentgrep.com/patent/US7745943B2 ## CPC - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 40/228: {the projecting parts being wire-shaped or pin-shaped} - H10W 70/688: {Flexible insulating substrates} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/00: Package configurations - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting} - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/884: {Die-attach connectors and bond wires} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/722: {between stacked chips} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate extends beyond the outer perimeter of the microelectronic element. The microelectronic package includes a plurality of etched conductive posts exposed at a surface of the substrate and being electrically interconnected with the microelectronic element, whereby at least one of the etched conductive posts is disposed in the outer region of the substrate. The package includes an encapsulating mold material in contact with the microelectronic element and overlying the outer region of the substrate, the encapsulating mold material extending outside of the etched conductive posts for defining an outermost edge of the microelectronic package. ## Claims ### Claim 1 The A microelectronic package comprising: a substrate having a top surface and a bottom surface; a microelectronic element overlying the top surface of said substrate; a plurality of conductive traces extending along at least one of the top or bottom surfaces of said substrate and conductively connected with said microelectronic element; a plurality of substantially rigid frustoconical conductive posts exposed at the bottom surface of said substrate, at least some of said posts having bases directly connected with said traces, said conductive traces and said posts being formed integrally by subtractively patterning a layered metal structure into said conductive traces and said posts, said bases defining maximum dimensions of said conductive posts in at least one direction in which said traces extend; and an encapsulating mold material in contact with said microelectronic element and overlying the top surface of said substrate, wherein said encapsulating mold material extends to an outer edge of said substrate and defines outermost edges of said microelectronic package. ### Claim 2 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element has faces and peripheral edges bounding the face, the top surface of said substrate has a central region confronting one of the faces of said microelectronic element and an outer region extending beyond at least one of the peripheral edges of said microelectronic element. ### Claim 3 (depends on 2) The package as claimed in claim 2, wherein at least one of said conductive posts is aligned with the outer region of the top surface. ### Claim 4 (depends on 3) The package as claimed in claim 3, further comprising a compliant layer disposed between said microelectronic element and said substrate, wherein said compliant layer overlies the at least one of said conductive posts that is disposed in the outer region of said substrate. ### Claim 5 (depends on 2) The package as claimed in claim 2, wherein at least one of said conductive posts is aligned with said central region. ### Claim 6 (depends on 1) The package as claimed in claim 1, wherein said encapsulating mold material extends outwardly beyond outermost ones of said conductive posts. ### Claim 7 (depends on 1) The package as claimed in claim 1, wherein said substrate is flexible. ### Claim 8 (depends on 1) The package as claimed in claim 1, wherein said substrate comprises a dielectric material. ### Claim 9 (depends on 1) The package as claimed in claim 1, wherein said conductive posts are movable independently of one another. ### Claim 10 (depends on 1) The package as claimed in claim 1, wherein said conductive posts are movable relative to said microelectronic element. ### Claim 11 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element has contacts accessible at a face that confronts the top surface of said substrate. ### Claim 12 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element has a face having contacts that faces away from the top surface of said substrate. ### Claim 13 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element is operable to interchange signals at a frequency above about 300 MHz through at least some of said conductive posts. ### Claim 14 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element has contacts that are spaced in a grid array over one or more faces of said microelectronic element. ### Claim 15 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element has contacts that are disposed in one or more rows extending over one or more faces of said microelectronic element. ### Claim 16 (depends on 1) The package as claimed in claim 1, wherein said encapsulating mold material serves as a rigid protective layer covering said microelectronic element and the top surface of said substrate. ### Claim 17 (depends on 16) The package as claimed in claim 16, wherein said mold material is made of a material selected from the group consisting of epoxies, glass and polymers. ### Claim 18 (depends on 16) The package as claimed in claim 16, wherein said substrate extends beyond an outer perimeter of said microelectronic element to define a gap and said mold material fills the gap. ### Claim 19 (depends on 1) The package as claimed in claim 1, wherein said microelectronic element comprises a semiconductor chip. ### Claim 20 (depends on 1) The microelectronic package as claimed in claim 1, wherein said conductive posts have bases in contact with one of the surfaces of said substrate. ### Claim 21 (depends on 1) The microelectronic package as claimed in claim 1, wherein said substrate has a central region that is aligned with said microelectronic element and at least one of said conductive posts is disposed within the central region of said substrate. ### Claim 22 (depends on 1) The package as claimed in claim 1, wherein said conductive posts extend a height of 50 to 300 microns from the bottom surface of the dielectric substrate. ### Claim 23 (depends on 22) The package as claimed in claim 22, wherein said conductive posts have frustoconical shape extending from the connection locations between the bases of the posts and the traces. ### Claim 24 A microelectronic package comprising: a microelectronic element having faces and contacts, said microelectronic element having an outer perimeter; a substrate overlying and spaced from a first face of said microelectronic element, wherein an outer region of said substrate extends beyond the outer perimeter of said microelectronic element; a plurality of conductive traces extending along at least one of the top or bottom surfaces and conductively connected with said microelectronic element; a plurality of substantially rigid frustoconical conductive posts exposed at a surface of said substrate, at least some of said posts having bases directly connected with said traces, said bases defining maximum dimensions of said conductive posts in at least one direction in which said traces extend, said conductive traces and said posts being formed integrally by subtractively patterning a layered metal structure into said conductive traces and said posts, wherein at least one of said conductive posts is disposed in the outer region of said substrate; and an encapsulating mold material in contact with said microelectronic element and overlying the outer region of said substrate. ### Claim 25 (depends on 24) The package as claimed in claim 24, further comprising a compliant layer disposed between said microelectronic element and said substrate. ### Claim 26 (depends on 25) The package as claimed in claim 25, wherein said compliant layer overlies all of said conductive posts. ### Claim 27 (depends on 24) The package as claimed in claim 24, wherein said encapsulating mold material extends outwardly beyond outermost ones of said conductive posts and defines outer edges of said package. ### Claim 28 (depends on 24) The package as claimed in claim 24, wherein said conductive posts extend a height of 50 to 300 microns from the bottom surface of the dielectric substrate. ### Claim 29 (depends on 28) The package as claimed in claim 28, wherein said conductive posts have frustoconical shape extending from the connection locations between the bases of the posts and the traces.