# US 7,745,920 B2 · Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,745,920 B2
- Document ID: US7745920B2
- Status: Granted
- Kind: B2
- Application number: 12/136,717
- Filed: 2008-06-10
- Published: 2009-12-10
- Granted: 2010-06-29
- Earliest claimed: 2008-06-10
- Assignees: Micron Technology, Inc.
- Inventors: Choon Kuan Lee; Chin Hui Chong; David J. Corisis
- Web page: https://patentgrep.com/patent/US7745920B2

## CPC

- H10W 90/00: Package configurations
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 70/656: Fan-in layouts
- H10W 72/321: {Structures or relative sizes of die-attach connectors}
- H10W 72/859: {Bump connectors and bond wires}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/22: the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
- H10W 90/26: the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged microelectronic device can include a support member, a first die attached to the support member, and a second die attached to the first die in a stacked configuration. The device can also include an attachment feature between the first and second dies. The attachment feature can be composed of a dielectric adhesive material. The attachment feature includes (a) a single, unitary structure covering at least approximately all of the back side of the second die, and (b) a plurality of interconnect structures electrically coupled to internal active features of both the first die and the second die.

## Claims

### Claim 1

A packaged microelectronic device, comprising:
a support member;
a first microelectronic die attached to the support member;
a second microelectronic die having an active side and a back side opposite the active side, wherein the second die is attached to the first die in a stacked configuration; and
an attachment feature between the first and second dies and attached to each of the first and second dies, wherein the attachment feature is composed of a dielectric adhesive material, and wherein the attachment feature includes (a) a single, unitary structure covering at least approximately all of the back side of the second die, and (b) a plurality of interconnect structures electrically coupled to internal active features of both the first die and the second die,
wherein the attachment feature comprises an at least initially generally flexible film attached to the back side of the second die and having a plurality of preformed openings extending completely through the film, and wherein the interconnect structures are formed in at least a portion of the openings.

### Claim 2 (depends on 1)

The microelectronic device of claim 1 wherein the attachment feature comprises a film-over-wire die attach film having a plurality of preformed apertures extending completely through the film.

### Claim 3 (depends on 1)

The microelectronic device of claim 1 wherein the attachment feature comprises an at least initially generally flexible film curable using a heating process.

### Claim 4 (depends on 1)

The microelectronic device of claim 1 wherein the first die and the second die each comprise one of a processor, a memory device, an imager, a filter, or a sensor.

### Claim 5 (depends on 1)

The microelectronic device of claim 1 wherein the only electrical connection between the second die and the first die is via the interconnect structures of the attachment feature.

### Claim 6 (depends on 1)

The microelectronic device of claim 1 wherein:
the second die includes a plurality of terminals proximate to the front side of the second die and a plurality of electrically conductive through-substrate interconnects in contact with the terminals and extending completely through the second die, the individual through-substrate interconnects having a back side portion accessible at the back side of the second die; and
the interconnect structures of the attachment feature are in contact with and electrically coupled to corresponding back side portions of the individual through-substrate interconnects of the second die.

### Claim 7 (depends on 1)

The microelectronic device of claim 1 wherein the interconnect structures are composed of at least one of Cu, Ni, Au, palladium, solder, and a conductive polymer.

### Claim 8 (depends on 1)

The microelectronic device of claim 1 wherein the interconnect structures are composed of a first conductive layer of Cu, a second conductive layer of Ni over at least a portion of the first layer, and a third layer of Au over at least a portion of the second layer.

### Claim 9 (depends on 1)

The microelectronic device of claim 1 wherein the second die has a thickness of between approximately 50 to 100 microns.

### Claim 10 (depends on 1)

The microelectronic device of claim 1 wherein:
the support member includes a first side, a second side opposite the first side, a plurality of support member terminals at the first side, and a plurality of contact pads at the second side and electrically coupled to corresponding support member terminals;
the first die includes a front side facing away from the support member, a back side facing the support member, a plurality of first terminals at the front side of the first die and electrically coupled to corresponding support member terminals with a plurality of wire bonds, and a plurality of second terminals at the front side of the second die and electrically coupled to corresponding interconnect structures of the attachment feature; and
the second die includes a plurality of second terminals at the front side of the second die and a plurality of through-substrate interconnects in contact with corresponding terminals and electrically coupling the terminals to the corresponding interconnect structures of the attachment feature.

### Claim 11 (depends on 10)

The microelectronic device of claim 10, further comprising a casing covering the first and second microelectronic dies, the attachment feature, the wire bonds, and at least a portion of the support member.

### Claim 12 (depends on 10)

The microelectronic device of claim 10 wherein the wire bonds extend through at least a portion of the attachment feature.

### Claim 13

A system, comprising:
at least one of a processor and a memory device, wherein at least one of the processor and the memory device includes a semiconductor component comprising an interposer substrate;
a first microelectronic die attached and electrically coupled to the interposer substrate, the first microelectronic die having an active side, a back side opposite the active side, integrated circuitry, and a plurality of terminals at the active side and electrically coupled to the integrated circuitry, wherein the back side of the first microelectronic die is facing the interposer substrate;
a second microelectronic die attached to the first die in a stacked arrangement, the second microelectronic die having an active side, a back side opposite the active side, integrated circuitry, a plurality of terminals electrically coupled to the integrated circuitry, and a plurality of electrically conductive through-substrate interconnects electrically coupled to the corresponding terminals, wherein the back side of the second microelectronic die is facing the first microelectronic die; and
a connection structure composed of a dielectric adhesive material between the first and second dies, the connection structure comprising an at least initially generally flexible film having a plurality of preformed openings extending completely through the film, wherein the connection structure is attached to the active side of the first die and the back side of the second die, and wherein the connection structure covers at least approximately all of the back side of the second die and includes a plurality of interconnect structures formed in at least a portion of the openings and electrically coupled to internal active features of both the first die and the second die.

### Claim 14 (depends on 13)

The system of claim 13 wherein the connection structure has a thickness less than the first die, the second die, and the support member.

### Claim 15 (depends on 13)

The system of claim 13 wherein the first microelectronic die includes a plurality of wire bonds electrically coupling the terminals to the corresponding contacts on the interposer substrate, and wherein connection structure covers at least a portion of the wire bonds.

### Claim 16

A packaged microelectronic device, comprising:
a support member;
a first microelectronic die attached to the support member;
a second microelectronic die having an active side and a back side opposite the active side, wherein the second die is attached to the first die in a stacked configuration; and
an attachment feature between the first and second dies and attached to each of the first and second dies, wherein the attachment feature comprises a film-over-wire die attach film having a plurality of preformed apertures extending completely through the film, and wherein the attachment feature includes (a) a single, unitary structure covering at least approximately all of the back side of the second die, and (b) a plurality of interconnect structures electrically coupled to internal active features of both the first die and the second die.