# US 7,745,896 B2 · Image sensor and method of manufacturing the same

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- Number: US 7,745,896 B2
- Document ID: US7745896B2
- Status: Granted
- Kind: B2
- Application number: 12/122,434
- Filed: 2008-05-16
- Published: 2008-11-20
- Granted: 2010-06-29
- Earliest claimed: 2007-05-17
- Assignees: Dongbu HiTek Co., Ltd.
- Inventors: Sang Wook Ryu
- Web page: https://patentgrep.com/patent/US7745896B2

## CPC

- H10F 39/811: {Interconnections}
- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- H10F 39/191: {Photoconductor image sensors}
- H10F 39/8063: {Microlenses}
- H10F 39/809: {of hybrid image sensors}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

An image sensor and method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, a metal interconnection layer, a light-receiving unit, a lens-type upper electrode, and a color filter. The semiconductor substrate can include a circuit region. The metal interconnection layer can include a metal interconnection and an interlayer dielectric. The light-receiving unit can be a photodiode disposed on the metal interconnection layer. The lens-type upper electrode can be disposed on the light-receiving unit and formed in a convex lens shape. The color filter can be disposed on the lens-type upper electrode.

## Claims

### Claim 1

An image sensor, comprising:
a semiconductor substrate having a complementary metal oxide semiconductor (CMOS) circuit formed thereon;
a metal interconnection layer including a metal interconnection and an interlayer dielectric on the semiconductor substrate including the CMOS circuit;
a light-receiving unit on the metal interconnection layer; and
an upper electrode on the light-receiving unit, the upper electrode being formed having a convex lens shape.

### Claim 2 (depends on 1)

The image sensor according to claim 1, wherein the light-receiving unit comprises:
a first conduction type conducting layer on the metal interconnection layer;
an intrinsic layer on the first conduction type conducting layer; and
a second conduction type conducting layer on the intrinsic layer.

### Claim 3 (depends on 1)

The image sensor according to claim 1, wherein the light-receiving unit comprises:
an intrinsic layer on the metal interconnection layer; and
a second conduction type conducting layer on the intrinsic layer.

### Claim 4 (depends on 1)

The image sensor according to claim 1, further comprising a lower electrode on the metal interconnection below the light receiving unit.

### Claim 5 (depends on 1)

The image sensor according to claim 1, wherein the lens-type upper electrode comprises a transparent electrode.

### Claim 6 (depends on 1)

The image sensor according to claim 1, further comprising a color filter on the upper electrode.

### Claim 7

A method of manufacturing an image sensor, comprising:
forming a complementary metal oxide semiconductor (CMOS) circuit on a semiconductor substrate;
forming a metal interconnection layer including metal interconnections and an interlayer dielectric on the semiconductor substrate, the metal interconnections providing connections for the CMOS circuit;
forming a light-receiving unit on the metal interconnection layer; and
forming a lens-type upper electrode on the light-receiving unit.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the forming of the lens-type upper electrode comprises:
depositing an electrode material on the light-receiving unit to form an upper electrode layer;
forming a microlens mask on the upper electrode layer; and
etching the upper electrode layer using the microlens mask as an etch mask.

### Claim 9 (depends on 8)

The method according to claim 8, wherein forming the microlens mask comprises:
applying a photoresist to the semiconductor substrate;
patterning the photoresist; and
performing a reflow process to the patterned photoresist.

### Claim 10 (depends on 8)

The method according to claim 8, wherein an etching rate between the upper electrode layer and the microlens mask is about 1:1.

### Claim 11 (depends on 8)

The method according to claim 8, wherein the etching of the upper electrode layer comprises using an etching gas of CxHyFz (where x, y, and z are 0 or a natural number) mixed with at least one of O2, N2, Ar, and He.

### Claim 12 (depends on 7)

The method according to claim 7, wherein the lens-type upper electrode comprises a transparent electrode.

### Claim 13 (depends on 6)

The method according to claim 6, further comprising:
forming a pad mask on the semiconductor substrate including the lens-type upper electrode; and
exposing a pad metal interconnection of the metal interconnection layer by performing an etching process using the pad mask as an etch mask.

### Claim 14 (depends on 13)

The method according to claim 13, wherein the exposing of the pad metal connection comprises using an etching gas of CxHyFz (where x, y, and z are 0 or a natural number) mixed with at least one of O2, N2, and Ar.

### Claim 15 (depends on 13)

The method according to claim 13, further comprising forming a color filter on the lens-type upper electrode after exposing the pad metal interconnection.

### Claim 16 (depends on 7)

The method according to claim 7, further comprising forming a color filter on the lens-type upper electrode.