# US 7,745,882 B2 · High-gain bipolar junction transistor compatible with complementary metal-oxide-semiconductor (CMOS) process and method for fabricating the same

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- Number: US 7,745,882 B2
- Document ID: US7745882B2
- Status: Granted
- Kind: B2
- Application number: 11/303,885
- Filed: 2005-12-16
- Published: 2006-06-22
- Granted: 2010-06-29
- Earliest claimed: 2004-12-17
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Je-Don Kim
- Web page: https://patentgrep.com/patent/US7745882B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/0109: {the at least one component covered by H10D12/00 or H10D30/00 being a MOS device}
- H10D 84/401: {Combinations of FETs or IGBTs with BJTs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method for forming a bipolar junction transistor comprises forming a first well of a second conductive type for forming a collector region in a substrate including device isolation layers, wherein the substrate comprises a first conductive type, forming a second well of the first conductive type for a metal-oxide-semiconductor transistor of the second conductive type within the first well of the second conductive type, wherein the second well of the first conductive type is formed deeper than the device isolation layers, forming a shallow third well of the first conductive type for a base region within the first well of the second conductive type, wherein the shallow third well of the first conductive type is formed shallower than the device isolation layers, and simultaneously forming an emitter region within the shallow third well of the first conductive type and a plurality of collector contacts within the first well of the second conductive type by performing an ion implantation process for forming source/drain regions of the metal-oxide-semiconductor transistor of the second conductive type.

## Claims

### Claim 1

A bipolar junction transistor, comprising:
a collector region of a second conductive type formed in a substrate of a first conductive type and isolated by a device isolation layer;
a buffer region of the second conductive type formed within the collector region and being deeper than the device isolation layer;
a base region of the first conductive type formed within the collector region, isolated from the buffer region by the device isolation layer and being shallower than the device isolation layer;
an emitter region of the second conductive type formed within the base region of the first conductive type; and
a collector contact of the second conductive type formed in the buffer region of the second conductive type,
wherein the emitter region in the base region and the collector contact in the buffer region are formed with substantially the same vertical thickness from a top surface of the substrate.

### Claim 2 (depends on 1)

The bipolar junction transistor of claim 1, further comprising:
a base contact of the first conductive type formed beneath a surface of the base region and being apart from the emitter region.

### Claim 3 (depends on 2)

The bipolar junction transistor of claim 2, further comprising:
a first well of the first conductive type formed within the collector region, isolated from the buffer region of the second conductive type by the device isolation layer and formed deeper than the device isolation layer;
a second well of the second conductive type formed in the substrate and disposed outside the collector region, isolated from the collector region by the device isolation layer and having the same conductive type as that of the buffer region of the second conductive type; and
a metal-oxide-semiconductor (MOS) transistor of the second conductive type formed on the first well of the first conductive type and a metal-oxide-semiconductor transistor of the first conductive type formed on the second well of the second conductive type.

### Claim 4 (depends on 3)

The bipolar junction transistor of claim 3, further comprising:
an anti-silicide formation layer formed on a portion of the base region between the emitter region and the base contact; and
a silicide layer formed on the collector contact, the base contact and the emitter region.

### Claim 5 (depends on 3)

The bipolar junction transistor of claim 3, wherein the first conductive type is a p-type and the second conductive type is an n-type.

### Claim 6

A semiconductor device, comprising:
a first well of a second conductive type for a collector region of a bipolar junction transistor, the first well formed in a substrate of a first conductive type and isolated by a device isolation layer;
a second well of the second conductive type being formed within the first well of the second conductive type and serving as a buffer for the collector region;
a third well of the second conductive type for forming a metal-oxide-semiconductor transistor of the first conductive type, the third well formed in the substrate disposed outside the first well of the second conductive type and isolated from the first well of the second conductive type by the device isolation layer;
a fourth well of the first conductive type for forming a metal-oxide-semiconductor transistor of the second conductive type, the fourth well formed within the first well of the second conductive type and isolated from the second well of the second conductive type by the device isolation layer;
a base region of the first conductive type formed within the first well of the second conductive type, isolated from the second well of the second conductive type by the device isolation layer and shallower than the device isolation layer;
an emitter region of the second conductive type formed within the base region;
the metal-oxide-semiconductor transistor of the second conductive type formed on the fourth well of the first conductive type and the metal-oxide-semiconductor transistor of the first conductive type formed on the third well of the second conductive type; and
a collector contact formed in the second well of the second conductive type and isolated from the base contact by the device isolation layer,
wherein the emitter region in the base region and the collector contact in the second well are formed with substantially the same vertical thickness from a top surface of the substrate.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, further including:
a base contact formed in the base region apart from the emitter region.

### Claim 8 (depends on 7)

The semiconductor device of claim 7, wherein the first conductive type is a p-type and the second conductive type is an n-type.

### Claim 9 (depends on 7)

The semiconductor device of claim 7, further comprising:
an anti-silicide formation layer formed on a portion of the base region between the emitter region and the base contact; and
a silicide layer formed on the collector contact, the base contact and the emitter region.

### Claim 10

A semiconductor device, comprising:
a collector region of a second conductive type formed in a substrate of a first conductive type, isolated by a device isolation layer and deeper than the device isolation layer;
a well of the first conductive type for forming a metal-oxide-semiconductor transistor of the second conductive type, the well of the first conductive type formed within the collector region and deeper than the device isolation layer;
a base region of the first conductive type formed within the collector region and shallower than the device isolation layer;
an emitter region of the second conductive type formed within the base region of the first conductive type;
the metal-oxide-semiconductor transistor of the second conductive type formed on the well of the first conductive type;
a buffer region of the second conductive type for decreasing a resistance of the collector region, the buffer region being formed within the collector region, isolated from the base region by the device isolation layer and deeper than the base region; and
a collector contact formed in the buffer region of the second conductive type in the collector region,
wherein the emitter region in the base region and the collector contact in the buffer region are formed with substantially the same vertical thickness from a top surface of the substrate.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, further including:
a well of the second conductive type formed in the substrate and disposed outside the collector region and having the same conductive type as that of the buffer region of the second conductive type; and
a metal-oxide-semiconductor transistor of the first conductive type formed on the well of the second conductive type.

### Claim 12 (depends on 10)

The semiconductor device of claim 10, wherein the base region of the first conductive type has a doping level lower than a doping level of the well of the first conductive type.