# US 7,745,878 B2 · Shielded gate trench (SGT) MOSFET cells implemented with a schottky source contact

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- Number: US 7,745,878 B2
- Document ID: US7745878B2
- Status: Granted
- Kind: B2
- Application number: 12/313,305
- Filed: 2008-11-18
- Published: 2009-03-19
- Granted: 2010-06-29
- Earliest claimed: 2005-02-11
- Assignees: Alpha and Omega Semiconductor Incorporated
- Inventors: Anup Bhalla; Sik K Lui
- Web page: https://patentgrep.com/patent/US7745878B2

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 30/0295: {using recessing of the source electrodes}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 30/665: {having edge termination structures}
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D 62/105: {by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] (IGFETs having LDD or drain extension regions H10D30/601)}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 64/252: {for vertical or pseudo-vertical devices}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/516: {the thicknesses being non-uniform}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.

## Claims

### Claim 1

A semiconductor power device comprising a plurality of power transistor cells surrounded by a plurality of trenches opened in a semiconductor substrate of a first conductivity type wherein said transistor cells comprising:
body regions of a second conductivity type extended between said trenches encompassing source regions of said first conductivity type disposed next to a plurality of a trenched gates disposed in said trenches;
a gate-to-drain shielding region formed as a body dopant region of said second conductivity type disposed below said trenched gates extending downwardly from a bottom of said trenched gates into said semiconductor substrate of said first conductivity type; and
a trenched source contact disposed substantially at a central portion of a mesa area between said trenched gates wherein said trenched source contact comprises a source contact trench opened in said mesa area at a distance away from said trenched gates and is filled with a source metal for electrically connecting the source and body regions on sidewalls of said source contact trench to a source metal layer disposed on top of an insulation layer wherein a trench bottom surface of said trenched source contact is further covered with a layer of conductive material below said source metal to function as an integrated Schottky barrier diode in said transistor cell wherein a plurality of punch through prevention regions doped with a body dopant of said second conductivity type disposed immediately below said source regions and in direct contact with trench walls of said trenched source contact, wherein the plurality of punch through prevention regions forming only in the body regions of the second conductivity type.

### Claim 2 (depends on 1)

The trenched power semiconductor power device of claim 1 wherein:
said layer of conductive material covering said trench bottom surface of said source contact trench is a layer of low barrier height metal.

### Claim 3 (depends on 1)

The trenched power semiconductor power device of claim 1 wherein:
said layer of conductive material covering said trench bottom surface of said source contact trench is a layer of Ti/TiN or TiSi2/TiN material.

### Claim 4 (depends on 1)

The semiconductor power device of claim 1 wherein:
said power transistor cells further comprising trenched metal oxide semiconductor field effect transistor (MOSFET) cells each having said integrated Schottky barrier diode disposed near said trench bottom surface of said trenched source contact disposed on said a mesa area at a distance away from trenched gates of said MOSFET cells.