# US 7,745,868 B2 · Semiconductor device and method of forming the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,745,868 B2
- Document ID: US7745868B2
- Status: Granted
- Kind: B2
- Application number: 11/984,470
- Filed: 2007-11-19
- Published: 2008-05-29
- Granted: 2010-06-29
- Earliest claimed: 2006-11-24
- Assignees: Elpida Memory, Inc.
- Inventors: Masahiko Ohuchi
- Web page: https://patentgrep.com/patent/US7745868B2

## CPC

- H10W 20/046: {the barrier, adhesion or liner layers being associated with interconnections of capacitors}
- H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug}
- H10B 12/315: {with the capacitor higher than a bit line}
- H10W 20/038: {covering conductive structures (H10W20/037 takes precedence)}
- H10W 20/039: {also covering sidewalls of the conductive structures}
- H10W 20/066: {by forming silicides of refractory metals}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A semiconductor device may include a MOS transistor having source and drain regions in a semiconductor substrate, a first inter-layer insulator having first contact holes that reach the source and drain regions over the MOS transistor. Cell contact plugs in the first contact holes contact with the source and drain regions. A second inter-layer insulator over the first inter-layer insulator and the cell contact plugs has second contact holes that reach the cell contact plugs. Contact plugs each have first and second portions. The first portion is in the second contact hole. The second portion extends over the first second inter-layer insulator. Metal barrier layers cover the upper surfaces of the second portions of the contact plugs. Capacitors each have a bottom electrode layer, a capacitive insulating layer and a top electrode layer. The bottom electrode layers each have a contact portion that contacts with the metal barrier layer.

## Claims

### Claim 1

A semiconductor device comprising: a semiconductor substrate;
a MOS transistor having source and drain regions that are provided in the semiconductor substrate;
a first inter-layer insulator over the MOS transistor, the first inter-layer insulator having first contact holes that reach the source and drain regions;
cell contact plugs in the first contact holes, the cell contact plugs contact with the source and drain regions;
a second inter-layer insulator over the first inter-layer insulator and the cell contact plugs, the second inter-layer insulator having second contact holes that reach the cell contact plugs;
contact plugs each having first and second portions, the first portion being in the second contact hole, the second portion extending over the second inter-layer insulator;
metal barrier layers that cover the upper surfaces of the second portions of the contact plugs; and
capacitors each having a bottom electrode layer, a capacitive insulating layer and a top electrode layer, the bottom electrode layers each having a contact portion that contacts with the metal barrier layer.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the contact plugs are made of polysilicon.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the second portion of the contact plug is larger in the area in plan view than the contact portion of the bottom electrode layer.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the metal barrier layer has a single layered structure that includes one of a tungsten nitride layer and a titanium nitride layer.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the metal barrier layer comprises one of:
a first multilayered structure of a titanium nitride layer and a titanium silicide layer;
a second multilayered structure of a tungsten layer and a tungsten nitride layer;
a third multilayered structure of a tungsten nitride layer and a tungsten silicide layer;
a fourth multilayered structure of a tungsten layer, a tungsten nitride layer and a tungsten silicide layer; and
a fifth multilayered structure of a tungsten layer, a titanium nitride layer and a titanium silicide layer.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the metal barrier layer has a single layered structure that includes one of a titanium silicide layer, a cobalt silicide layer, and a tungsten silicide layer.

### Claim 7

A semiconductor device comprising:
a first insulator having a first contact hole;
a first contact plug of polysilicon, the first contact plug having first and second portions, the first portion being in the first contact hole, the second portion extending over the first insulator, the first portion having a first dimension defined in a direction parallel to a surface of the first insulator, the second portion having a second dimension defined in the direction parallel to the surface of the first insulator, the second dimension being greater than the first dimension;
a metal barrier layer that contacts with at least an upper surface of the second portion of the first contact plug, the metal barrier layer having a metal-polysilicon interface with the first contact plug of polysilicon, the metal-polysilicon interface having a first area; and
a first metal electrode layer having a contact portion that contacts with a part of the metal barrier layer, the first metal electrode layer being separated by the metal barrier layer from the first contact plug of polysilicon, the first metal electrode layer having a metal-metal interface with the metal barrier layer, the metal-metal interface having a second area that is smaller than the first area, the contact portion of the first metal electrode having a third dimension defined in the direction parallel to the surface of the first insulator, the third dimension of the contact portion of the first metal electrode layer being smaller than the first dimension.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein the metal barrier layer contacts with the upper surface and side edge of the second portion of the first contact plug.

### Claim 9 (depends on 7)

The semiconductor device according to claim 7, further comprising:
a semiconductor substrate;
a diffusion region in the semiconductor substrate; and
a second contact plug of polysilicon, the second contact plug having third and fourth portions, the third portion contacting with the diffusion region, the fourth portion contacting with the first portion of the first contact plug, the third portion having a third dimension defined in the direction parallel to the surface of the first insulator, the fourth portion having a fourth dimension defined in the direction parallel to the surface of the first insulator, the fourth dimension being greater than the third dimension and the first dimension.