# US 7,745,865 B2 · Devices and methods for preventing capacitor leakage

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- Number: US 7,745,865 B2
- Document ID: US7745865B2
- Status: Granted
- Kind: B2
- Application number: 11/184,786
- Filed: 2005-07-20
- Published: 2007-01-25
- Granted: 2010-06-29
- Earliest claimed: 2005-07-20
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Kuo-Chi Tu
- Web page: https://patentgrep.com/patent/US7745865B2

## CPC

- H10D 1/692: {Electrodes}
- H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

Devices and methods for preventing capacitor leakage caused by sharp tip. The formation of sharp tip is avoided by a thicker bottom electrode which fully fills a micro-trench that induces formation of the sharp tip. Alternatively, formation of the sharp tip can be avoided by recessing the contact plug to substantially eliminate the micro-trench.

## Claims

### Claim 1

A semiconductor device, comprising:
a contact plug formed in a contact opening through a first insulating layer;
an etch stop layer on the first insulating layer;
a second insulating layer directly on the etch stop layer;
a capacitor landing on the contact plug with an overlay shift, comprising a bottom electrode on the top and sidewall of the contact plug, a capacitor dielectric on the bottom electrode, and a top electrode on the capacitor dielectric;
wherein the second insulating layer defines the height of the capacitor bottom electrode;
wherein one corner of the top surface of the contact plug is covered by the capacitor;
wherein the etch stop layer extends to other three corners of the contact plug not covered by the capacitor; and
wherein the total thickness Z of the bottom electrode and the capacitor dielectric satisfies at least one of the conditions:
Z≧Y or Z≧½X
where X is the distance of the overlay shift, and Y is the height of the sidewall of the contact plug covered by the bottom electrode.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the contact plug is formed over a source/drain region of a MOSFET transistor.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the capacitor is a cup-shaped capacitor.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the etch stop layer is a single-layered etch stop layer.