# US 7,745,858 B2 · Photodiode with self-aligned implants for high quantum efficiency and method of formation

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- Number: US 7,745,858 B2
- Document ID: US7745858B2
- Status: Granted
- Kind: B2
- Application number: 11/636,979
- Filed: 2006-12-12
- Published: 2008-01-10
- Granted: 2010-06-29
- Earliest claimed: 2003-09-05
- Assignees: Aptina Imaging Corporation
- Inventors: Chandra Mouli; Howard Rhodes
- Web page: https://patentgrep.com/patent/US7745858B2

## CPC

- H10F 39/80: {Constructional details of image sensors}
- H10F 39/80373: {characterised by the gate of the transistor}
- H10F 39/014: {of CMOS image sensors}
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F 39/807: {Pixel isolation structures}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A pinned photodiode with a pinned surface layer formed by a self-aligned angled implant is disclosed. The angle of the implant may be tailored to provide an adequate offset between the pinned surface layer and an electrically active area of a transfer gate of the pixel sensor cell. The pinned surface layer is formed by employing the same mask level as the one employed for the formation of the photodiode region, and then implanting dopants at angles other than zero degrees.

## Claims

### Claim 1

A photodiode for use in an imaging device, said photodiode comprising:
a charge collection region formed in a substrate of a first conductivity type for accumulating photo-generated charge, said charge collection region being of a second conductivity type and being adjacent a gate of a transistor formed over said substrate, said gate transferring charge accumulated in said charge collection region to a doped region of said second conductivity type; and
a doped layer of said first conductivity type, said doped layer being laterally displaced from an electrically active portion of said gate by a distance of about 200 to about 1,000 Angstroms.

### Claim 2 (depends on 1)

The photodiode of claim 1, wherein said doped layer is adjacent and in contact with an isolation region formed in said substrate.

### Claim 3 (depends on 1)

The photodiode of claim 1, wherein said first conductivity type is p-type and said second conductivity type is n-type.

### Claim 4 (depends on 3)

The photodiode of claim 3, wherein said doped layer is doped with a p-type dopant at a dopant concentration of from about 1×1017 to about 1×1019 atoms per cm3.

### Claim 5 (depends on 4)

The photodiode of claim 4, wherein said doped layer has a dopant concentration of from about 5×1017 to about 5×1018 atoms per cm3.

### Claim 6 (depends on 1)

The photodiode of claim 1, wherein said charge collection region is doped with an n-type dopant at a dopant concentration of from about 1×1016 to about 5×1017 atoms per cm3.

### Claim 7 (depends on 1)

The photodiode of claim 1, wherein said photodiode is one of a p-n-p photodiode or an n-p-n photodiode.

### Claim 8 (depends on 1)

The photodiode of claim 1, wherein said first conductivity type is n-type and said second conductivity type is p-type.

### Claim 9 (depends on 1)

The photodiode of claim 1, wherein said imaging device is one of a 3T, 4T, 5T, 6T or 7T imaging device.

### Claim 10 (depends on 1)

The photodiode of claim 1, wherein said imaging device is a CMOS imager.

### Claim 11 (depends on 1)

The photodiode of claim 1, wherein said imaging device is a CCD imager.

### Claim 12

An image pixel comprising:
an isolation region formed within a semiconductor substrate;
a gate structure of a transfer transistor formed over said semiconductor substrate; and
a photodiode adjacent said gate, said photodiode comprising a surface layer of a first conductivity type and a doped region of a second conductivity type located below said surface layer and extending below at least a portion of said gate structure, said surface layer being laterally displaced from an electrically active portion of said gate by a distance of about 200 to about 1,000 Angstroms and in contact with said isolation region.

### Claim 13 (depends on 12)

The image pixel of claim 12, wherein said surface layer is doped with a p-type dopant at a dopant concentration of from about 1×1017 to about 1×1019 atoms per cm3.

### Claim 14 (depends on 13)

The image pixel of claim 13, wherein said surface layer has a dopant concentration of from about 5×1017 to about 5×1018 atoms per cm3.

### Claim 15

A CMOS image sensor comprising:
a semiconductor substrate;
an isolation region formed within said semiconductor substrate; and
a pixel adjacent said isolation region, said pixel comprising a photodiode adjacent a gate of a transistor, said photodiode further comprising a surface layer of a first conductivity type and a doped region of a second conductivity type located below said surface layer and extending below at least a portion of said gate, said surface layer being laterally displaced from an electrically active portion of said gate by a distance of about 200 to about 1,000 Angstroms and in contact with said isolation region.

### Claim 16 (depends on 15)

The CMOS image sensor of claim 15, wherein said surface layer is adjacent and in contact with said isolation region.

### Claim 17 (depends on 15)

The CMOS image sensor of claim 15, wherein said first conductivity type is p-type and said second conductivity type is n-type.

### Claim 18 (depends on 15)

The CMOS image sensor of claim 15, wherein said surface layer is doped with boron or indium.

### Claim 19 (depends on 15)

The CMOS image sensor of claim 15, wherein said surface layer is doped with a p-type dopant at a dopant concentration of from about 1×1017 to about 1×1019 atoms per cm3.

### Claim 20 (depends on 19)

The CMOS image sensor of claim 19, wherein said surface layer has a dopant concentration of from about 5×1017 to about 5×1018 atoms per cm3.

### Claim 21 (depends on 15)

The CMOS image sensor of claim 15, wherein said photodiode is a p-n-p photodiode.

### Claim 22 (depends on 15)

The CMOS image sensor of claim 15, wherein said photodiode is an n-p-n photodiode.

### Claim 23 (depends on 15)

The CMOS image sensor of claim 15, wherein said transistor is one of a transfer transistor or a reset transistor.

### Claim 24

A CMOS image sensor comprising:
a silicon substrate;
a field oxide region formed within said silicon substrate; and
a pixel adjacent said field oxide region, said pixel comprising a p-n-p photodiode adjacent a gate of a transistor, said p-n-p photodiode further comprising a p-type surface layer and an n-type doped region located below said p-type surface layer and relative to said p-type surface layer, said p-type surface layer being laterally displaced from said gate by a distance of about 200 to about 1,000 Angstroms and in contact with said field oxide region.

### Claim 25 (depends on 24)

The CMOS image sensor of claim 24, wherein said p-type surface layer is adjacent and in contact with said field oxide region.

### Claim 26 (depends on 24)

The CMOS image sensor of claim 24, wherein said p-type surface layer and said n-type doped region are both located within a p-type doped region.

### Claim 27 (depends on 24)

The CMOS image sensor of claim 24, wherein said p-type surface layer is doped with a dopant at a dopant concentration of from about 1×1017 to about 1×1019 atoms per cm3.

### Claim 28 (depends on 27)

The CMOS image sensor of claim 27, wherein said p-type surface layer has a dopant concentration of from about 5×1017 to about 5×1018 atoms per cm3.

### Claim 29 (depends on 24)

The CMOS image sensor of claim 24, wherein said transistor is one of a transfer transistor or a reset transistor.