# US 7,745,830 B2 · LCD with increased pixel opening sizes

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- Number: US 7,745,830 B2
- Document ID: US7745830B2
- Status: Granted
- Kind: B2
- Application number: 12/453,344
- Filed: 2009-05-07
- Published: 2009-10-15
- Granted: 2010-06-29
- Earliest claimed: 1995-06-06
- Assignees: LG Display Co., Ltd.
- Inventors: Tieer Gu; Willem den Boer
- Web page: https://patentgrep.com/patent/US7745830B2

## CPC

- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- G02F 1/136213: {Storage capacitors associated with the pixel electrode}
- G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- H10D 30/0316: {of lateral bottom-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6725: {having supplementary regions or layers for improving the flatness of the device}
- H10D 86/00: Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/60: wherein the TFTs are in active matrices
- H10F 39/195: {X-ray, gamma-ray or corpuscular radiation imagers}
- G02F 1/133357: {Planarisation layers}
- G02F 1/13606: {having means for reducing parasitic capacitance}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- G02F 2202/42: Materials having a particular dielectric constant
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A liquid crystal display having an increased pixel aperture ratio is disclosed along with a method of making same. An array of a-Si TFTs is deposited on a transparent substrate. Subsequently, an organic insulating layer (e.g. Benzocyclobutene) and a corresponding array of pixel electrodes are deposited over the TFT array so that the pixel electrodes overlap the display address lines thereby increasing the display's pixel aperture ratio. The low dielectric constant ∈ (e.g. about 2.7) and relatively high thickness (e.g. greater than about 1.5 μm) of the insulating layer reduce the pixel electrode-address line parasitic capacitance CPL in the overlap areas thereby reducing cross-talk (or capacitive coupling) in the display. In sum, an increased pixel aperture ratio is achieved without sacrificing display performance.

## Claims

### Claim 1

A liquid crystal display comprising:
a liquid crystal layer between first and second substrates;
a plurality of gate address lines and a plurality of data address lines crossing each other to define a plurality of pixel regions on the first substrate;
a thin film transistor and a pixel electrode in each pixel region, the thin film transistor including a semiconductor layer, a gate electrode connected to one of the plurality of gate address lines, a drain electrode connected to one of the plurality of data address lines, and a source electrode connected to the pixel electrode, the pixel electrode overlapping the gate and data address lines; and
an insulating layer between the pixel electrode and the data address lines,
wherein A/d<418.5 μm, where A is the area of a portion of where the pixel overlaps the gate and data address lines and d is a thickness of the insulating layer in the overlapping areas.

### Claim 2 (depends on 1)

The liquid crystal display of claim 1, wherein A/d<376.6 μm.

### Claim 3 (depends on 1)

The liquid crystal display of claim 1, wherein the pixel electrode overlaps the gate and drain address lines along substantially their entire lengths so as to increase the pixel aperture ratio.

### Claim 4

A liquid crystal display comprising:
a liquid crystal layer between first and second substrates;
a plurality of gate address lines and a plurality of data address lines crossing each other to define a plurality of pixel regions on the first substrate;
a thin film transistor and a pixel electrode in each pixel region, the thin film transistor including a semiconductor layer, a gate electrode connected to one of the plurality of gate address lines, a drain electrode connected to one of the plurality of data address lines, and a source electrode connected to the pixel electrode, the pixel electrode overlapping the gate and data address lines; and
an insulating layer between the pixel electrode and the data address lines,
wherein A·∈<3389.8 μm2, where A is the area of a portion of where the pixel overlaps the gate and data address lines and ∈ is a dielectric constant of the insulating layer in the overlapping areas.

### Claim 5 (depends on 4)

The liquid crystal display of claim 4, wherein A·∈<2259.9 μm2.

### Claim 6 (depends on 4)

The liquid crystal display of claim 4, wherein A·∈<1694.9 μm2.

### Claim 7 (depends on 4)

The liquid crystal display of claim 4, wherein 1694.9 μm2<A·∈<2259.9 μm2.

### Claim 8 (depends on 4)

The liquid crystal display of claim 4, wherein the pixel electrode overlaps the gate and drain address lines along substantially their entire lengths so as to increase the pixel aperture ratio.

### Claim 9

A liquid crystal display comprising:
a liquid crystal layer between first and second substrates;
a plurality of gate address lines and a plurality of data address lines crossing each other to define a plurality of pixel regions on the first substrate;
a thin film transistor and a pixel electrode in each pixel region, the thin film transistor including a semiconductor layer, a gate electrode connected to one of the plurality of gate address lines, a drain electrode connected to one of the plurality of data address lines, and a source electrode connected to the pixel electrode, the pixel electrode overlapping the gate and data address lines; and
an insulating layer between the pixel electrode and the data address lines, wherein A<1255.5 μm2, where A is the area of a portion of where the pixel overlaps the gate.

### Claim 10 (depends on 9)

The liquid crystal display of claim 9, wherein A<1129.9 μm2.

### Claim 11 (depends on 9)

The liquid crystal display of claim 9, wherein A<837 μm2.

### Claim 12 (depends on 9)

The liquid crystal display of claim 9, wherein A<753.3 μm2.

### Claim 13 (depends on 9)

The liquid crystal display of claim 9, wherein A<627.7 μm2.

### Claim 14 (depends on 9)

The liquid crystal display of claim 9, wherein A<565.0 μm2.

### Claim 15 (depends on 9)

The liquid crystal display of claim 9, wherein 837 μm2<A<1255.5 μm2.

### Claim 16 (depends on 9)

The liquid crystal display of claim 9, wherein 753.3 μm2<A<1129.9 μm2.

### Claim 17 (depends on 9)

The liquid crystal display of claim 9, wherein the pixel electrode overlaps the gate and drain address lines along substantially their entire lengths so as to increase the pixel aperture ratio.
