# US 7,745,820 B2 · Negative differential resistance polymer devices and circuits incorporating same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,745,820 B2 - Document ID: US7745820B2 - Status: Granted - Kind: B2 - Application number: 11/592,419 - Filed: 2006-11-03 - Published: 2010-04-08 - Granted: 2010-06-29 - Earliest claimed: 2005-11-03 - Assignees: The Ohio State University - Inventors: Paul R. Berger; Woo-Jun Yoon - Web page: https://patentgrep.com/patent/US7745820B2 ## CPC - H10N 80/00: Bulk negative-resistance effect devices (integrated devices or assemblies of multiple devices H10N89/00) - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR ## Abstract A device includes: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact. The tunneling barrier layer has a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. Circuits are also disclosed that utilize one or more negative differential resistance polymer diodes to implement logic, memory, or mixed signal applications. ## Claims ### Claim 1 A device comprising: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact, the tunneling barrier layer having a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values; wherein the first electrical contact, the second electrical contact, the semiconducting or semimetallic organic layer, and the tunneling barrier layer define a negative differential resistance polymer diode. ### Claim 2 (depends on 1) The device as set forth in claim 1, further comprising: a flexible substantially planar support on which are disposed the first and second electrical contacts, the semiconducting or semimetallic organic layer, and the tunneling barrier layer. ### Claim 3 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer comprises a metal oxide layer. ### Claim 4 (depends on 3) The device as set forth in claim 3, wherein the metal oxide tunneling barrier layer consists essentially of TiO2. ### Claim 5 (depends on 4) The device as set forth in claim 4, wherein the semiconducting or semimetallic organic layer comprises a polyphenylene vinylene (PPV) or PPV derivative material. ### Claim 6 (depends on 3) The device as set forth in claim 3, wherein the semiconducting or semimetallic organic layer comprises a polyphenylene vinylene (PPV) or PPV derivative material. ### Claim 7 (depends on 1) The device as set forth in claim 1, wherein the semiconducting or semimetallic organic layer comprises a polymer material. ### Claim 8 (depends on 1) The device as set forth in claim 1, wherein the semiconducting or semimetallic organic layer comprises a small molecule material. ### Claim 9 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer comprises an oxidized titanium layer. ### Claim 10 (depends on 9) The device as set forth in claim 9, wherein the first electrical contact comprises an indium tin oxide (ITO) layer, and the oxidized titanium tunneling barrier layer contacts the ITO layer. ### Claim 11 (depends on 1) The device as set forth in claim 1, wherein the semiconducting or semimetallic organic layer comprises a polyphenylene vinylene (PPV) or PPV derivative material. ### Claim 12 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer has a thickness of less than 30 nanometers. ### Claim 13 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer has a thickness of less than 10 nanometers. ### Claim 14 A device comprising first and second negative differential resistance polymer diodes electrically connected in series to define a latching or memory element having at least two stable states, each negative differential resistance polymer diode including: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact, the tunneling barrier layer having a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. ### Claim 15 (depends on 14) The device as set forth in claim 14, wherein the latching or memory element further comprises at least one of a transistor, and a resistor. ### Claim 16 (depends on 14) The device as set forth in claim 14, further comprising: an array of said latching or memory elements each having at least two stable states; and logic circuitry operatively coupled with the array to define a data memory. ### Claim 17 (depends on 16) The device as set forth in claim 16, wherein the array and logic circuitry are disposed on a flexible card. ### Claim 18 A device comprising: a first electrical contact, a second electrical contact, a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts, and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact, the tunneling barrier layer having a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values, wherein the first electrical contact, the second electrical contact, the semiconducting or semimetallic organic layer, and the tunneling barrier layer define a negative differential resistance polymer diode; and additional circuit elements interconnected with the negative differential resistance polymer diode to define a mixed signal circuit. ### Claim 19 (depends on 18) The device as set forth in claim 18, wherein the mixed signal circuit comprises an oscillator configured to generate a radio frequency output. ### Claim 20 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer comprises a material selected from a group consisting of: a metal oxide, a Langmuir-Blodgett film, a self assembled monolayer (SAM), and a wide bandgap semiconductor. ### Claim 21 (depends on 20) The device as set forth in claim 20, wherein the semiconducting or semimetallic organic layer comprises a material selected from a group consisting of: a cyano-polyphenylene vinylene (CN-PPV), a polyphenylene vinylene (PPV), a PPV copolymer, a polyfluorene (PFO, PFE), a polythiophene, a ladder-type polymer, a co-polymer, a poly(aryleneethynylene), a semiconducting small molecule, and a light emitting metal complex. ### Claim 22 (depends on 20) The device as set forth in claim 20, wherein the semiconducting or semimetallic organic layer comprises polyphenylene vinylene (PPV) or PPV derivative material. ### Claim 23 (depends on 1) The device as set forth in claim 1, wherein the tunneling barrier layer has localized defect sites within the bandgap, the tunneling barrier layer having a thickness effective to enable flow of electrical current through the tunneling barrier layer through the localized defect sites within the bandgap of the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. ### Claim 24 (depends on 23) The device as set forth in claim 23, wherein the localized defect sites within the bandgap of the tunneling barrier layer comprise localized defect sites near the conduction band of the tunneling barrier layer. ### Claim 25 (depends on 23) The device as set forth in claim 23, wherein the tunneling barrier layer comprises TiO2.