# US 7,745,348 B2 · Manufacturing method of a semiconductor device

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- Number: US 7,745,348 B2
- Document ID: US7745348B2
- Status: Granted
- Kind: B2
- Application number: 11/228,419
- Filed: 2005-09-15
- Published: 2006-03-23
- Granted: 2010-06-29
- Earliest claimed: 2004-09-17
- Assignees: Dongbu Electronics Co., Ltd.
- Inventors: Han-Choon Lee
- Web page: https://patentgrep.com/patent/US7745348B2

## CPC

- C23C 16/45542: {Plasma being used non-continuously during the ALD reactions}
- C23C 16/34: Nitrides {(C23C16/303 takes precedence)}
- C23C 16/50: using electric discharges {(generation and control of plasma in discharge tubes for surface treatment H01J37/32, H01J37/34)}
- H10P 14/418: {the conductive layers comprising transition metals}
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a semiconductor device employs a PEALD method including using an organometallic Ta precursor to form a TaN thin film. As a result, a conformal TaN diffusion barrier may be formed at a temperature of 250° C. or higher, so that impurities are reduced and density is increased in the TaN thin film.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, comprising:
forming a TaN thin film from a Ta precursor comprising pentakis ethylmethylamino tantalum (PEMAT), tertbutylimido tris-dimethylamide tantalum (TBTDET), pentakis diethylamide tantalum (PDEAT), or pentakis dimethylamide tantalum (PDMAT) by plasma-enhanced atomic layer deposition (PEALD) using a plasma gas comprising hydrogen (H2) and nitrogen (N2) at a temperature of 400° C. or higher on a substrate having a plurality of predetermined structures therein and/or thereon, wherein the TaN thin film contains not more than 10% of carbon impurities;
depositing a seed copper layer on the TaN thin film; and
forming a copper line on the seed copper layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the seed copper layer is formed by a Physical Vapor deposition (PVD) method.

### Claim 3 (depends on 1)

The method of claim 1, wherein depositing the seed copper layer comprises a PVD method, an ALD method, or a CVD method.

### Claim 4 (depends on 1)

The method of claim 1, wherein the semiconductor device is on or in a substrate and/or a dual damascene pattern and/or a single damascene pattern.

### Claim 5 (depends on 1)

The method of claim 1, wherein the Ta precursor comprises PEMAT.

### Claim 6 (depends on 1)

The method of claim 1, wherein the Ta precursor comprises PDEAT.

### Claim 7 (depends on 1)

The method of claim 1, wherein the Ta precursor comprises PDMAT.

### Claim 8 (depends on 1)

The method of claim 1, wherein the Ta precursor comprises TBTDET.

### Claim 9 (depends on 1)

The method of claim 1, wherein the plasma gas is carbon-free and oxygen-free.

### Claim 10 (depends on 1)

The method of claim 1, wherein the TaN thin film contains not more than 10% of oxygen impurities.

### Claim 11 (depends on 1)

The method of claim 1, wherein forming the TaN thin film comprises depositing the TaN thin film into a via hole pattern, the via hole having an opening width of about 0.18 μm.

### Claim 12 (depends on 11)

The method of claim 11, wherein forming the TaN thin film comprises depositing the TaN thin film into a via hole pattern, the via hole having an aspect ratio of about 6:1.

### Claim 13 (depends on 12)

The method of claim 12, wherein forming the TaN thin film comprises depositing the TaN thin film using about 200 cycles of plasma processing.

### Claim 14 (depends on 1)

The method of claim 1, wherein forming the TaN thin film comprises depositing the TaN thin film into a via hole pattern, the via hole having an aspect ratio of about 6:1.

### Claim 15 (depends on 1)

The method of claim 1, wherein forming the TaN thin film comprises depositing the TaN thin film using about 200 cycles of plasma processing.

### Claim 16 (depends on 1)

The method of claim 1, wherein the method further comprises:
depositing tantalum on the TaN thin film; and
depositing the seed copper layer on the tantalum.

### Claim 17 (depends on 16)

The method of claim 16, wherein the copper line is formed on the seed copper layer by PVD, ALD, or CVD.

### Claim 18 (depends on 1)

The method of claim 1, wherein the copper line is formed on the seed copper layer by PVD, ALD, or CVD.