# US 7,745,326 B2 · Semiconductor device having multiple wiring layers and method of producing the same

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- Number: US 7,745,326 B2
- Document ID: US7745326B2
- Status: Granted
- Kind: B2
- Application number: 12/501,901
- Filed: 2009-07-13
- Published: 2009-11-05
- Granted: 2010-06-29
- Earliest claimed: 2001-06-12
- Assignees: Kabushiki Kaisha Toshiba
- Inventors: Yoshiaki Shimooka; Hideki Shibata; Hideshi Miyajima; Kazuhiro Tomioka
- Web page: https://patentgrep.com/patent/US7745326B2

## CPC

- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/072: {of dielectric parts comprising air gaps}
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- H10W 20/46: comprising air gaps
- H10W 20/48: Insulating materials thereof
- H10W 20/495: {Capacitive arrangements or effects of, or between wiring layers}
- H10W 20/084: {for dual-damascene structures}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating film, fills metallic films in the grooves to form wirings, etches the first interlayer-insulating film with the wirings as a mask and removes the interlayer-insulating film between the wirings to provide grooves to be filled, and fills a second interlayer-insulating film made of a material of low dielectric constant in the grooves to be filled.

## Claims

### Claim 1

A method of producing a semiconductor device including a plurality of wiring layers, comprising:
forming a first interlayer-insulating film;
forming a plurality of first grooves for wiring in the first interlayer-insulating film;
forming a first wiring layer by filling metallic films in the first grooves for wiring;
polishing and removing upper surfaces of the first wiring layer and the first interlayer-insulating film to flatten the upper surfaces thereof;
forming a second interlayer-insulating film on flattened upper surfaces of the first wiring layer and the first interlayer-insulating film;
simultaneously forming a first contact hole and a second groove for wiring in the second interlayer-insulating film;
forming a second wiring layer including a wiring and plug by filling metallic films in the second groove for wiring;
polishing and removing upper surfaces of the second wiring layer and the second interlayer-insulating film to flatten the upper surfaces thereof;
etching the second interlayer-insulating film with the second wiring layer as a mask and removing a portion of the second interlayer-insulating film between the second wiring layers to provide grooves to be filled;
depositing a third interlayer-insulating film on the second interlayer-insulating film and the second wiring layer;
performing a thermal process at a predetermined temperature to promote dehydrating polymerization and solvent evaporation to generate pores in the third interlayer-insulating film so as to form a porous insulating film; and
polishing and removing an upper surface of the third interlayer-insulating film to flatten the upper surface thereof.

### Claim 2 (depends on 1)

The method of producing a semiconductor device according to claim 1,
wherein the dehydrating polymerization is achieved by annealing at a temperature in a range from 300 to 450° C., or as low as possible for the thermal process.

### Claim 3 (depends on 1)

The method of producing a semiconductor device according to claim 1,
wherein the dehydrating polymerization is achieved by annealing in an NH3-gas ambient or with electron-beam irradiation.

### Claim 4 (depends on 1)

The method of producing a semiconductor device according to claim 1,
further comprising, after polishing and removing the upper surfaces of the second wiring layer and the second interlayer-insulating film to flatten the upper surfaces thereof:
forming a cap layer as a mask for etching in a next process on a top of the second wiring layer.

### Claim 5 (depends on 1)

The method of producing a semiconductor device according to claim 1,
wherein the predetermined temperature for the solvent evaporation is 400° C.

### Claim 6 (depends on 1)

The method of producing a semiconductor device according to claim 1,
wherein the second interlayer-insulating film is made of at least one insulating film in the grooves to be filled, the insulating film being made of a material selected from a group consisting of resin having siloxane bonding as a major structure, resin having C—C bonding as a major structure, or a resin having C═C bonding as a major structure.

### Claim 7 (depends on 1)

The method of producing a semiconductor device according to claim 1,
wherein at etching the second interlayer-insulating film to provide the grooves to be filled, the second interlayer-insulating film is left with a predetermined thickness without exposure of the upper surface of the first interlayer-insulating film.

### Claim 8 (depends on 1)

The method of producing a semiconductor device according to claim 1,
further comprising, after polishing and removing upper surfaces of the first wiring layer and the first interlayer-insulating film to flatten the upper surfaces thereof:
depositing a barrier insulating film on the first interlayer-insulating film and the first wiring layer being flattened; and
forming the second interlayer-insulating film on the barrier insulating film.