# US 7,745,324 B1 · Interconnect with recessed dielectric adjacent a noble metal cap

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- Number: US 7,745,324 B1
- Document ID: US7745324B1
- Status: Granted
- Kind: B1
- Application number: 12/351,367
- Filed: 2009-01-09
- Published: 2010-07-15
- Granted: 2010-06-29
- Earliest claimed: 2009-01-09
- Assignees: International Business Machines Corporation
- Inventors: Chih-Chao Yang; Shyng-Tsong Chen; Baozhen Li
- Web page: https://patentgrep.com/patent/US7745324B1

## CPC

- H10W 20/037: {the barrier, adhesion or liner layers being on top of a main fill metal}
- H10P 50/267: {using plasmas}
- H10P 50/28: of insulating materials
- H10P 70/27: {during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/064: {by modifying the conductivity of conductive parts, e.g. by alloying}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The invention comprises a copper interconnect structure that includes a noble metal cap with dielectric immediately adjacent the copper/noble metal cap interface recessed from the noble metal cap.

## Claims

### Claim 1

A method of forming an interconnect structure, comprising:
depositing a first dielectric layer of ultra low-k material;
forming a sacrificial dielectric layer over said first dielectric layer;
forming an interconnect feature in said sacrificial dielectric layer and first dielectric layer by:
etching an opening in said sacrificial dielectric layer and first dielectric layer;
depositing a liner over said sacrificial dielectric layer and within said opening;
overfilling said opening with a conductive material; and,
performing a chemical mechanical polishing process to remove a portion of said conductive material, a portion of said liner, and said sacrificial dielectric layer such that top surface of said conductive material filled opening is coplanar with said first dielectric layer;
depositing a noble metal layer on top of said interconnect feature;
annealing said interconnect feature such that an alloy layer forms in said conductive material adjacent said noble metal layer;
removing said noble metal layer and a portion of said first dielectric layer using a gas cluster ion beam, leaving a portion of said liner and said alloy layer protruding from said first dielectric layer; and,
depositing a second dielectric layer over said first dielectric layer and said protruding liner and alloy layer.

### Claim 2 (depends on 1)

A method as in claim 1, wherein said sacrificial dielectric material layer is formed from a material selected from a group consisting of silicon dioxide (SiO2), silicon nitride (Si3N4), and silicon carbide (SiC).

### Claim 3 (depends on 1)

A method as in claim 1, wherein said noble metal layer is deposited by a method selected from a group consisting of chemical vapor deposition (CVD), atomic layer deposition (ALD), electroless plating and electro plating techniques.

### Claim 4 (depends on 1)

A method as in claim 1, wherein said noble metal layer is selected from a group consisting of ruthenium (Ru), rhodium (Rh), iridium (Ir), cobalt (Co), tungsten (W), platinum (Pt) and alloys thereof.

### Claim 5 (depends on 1)

A method as in claim 1, wherein said gas cluster ion beam contains a concentration of nitrogen trifloride (NF3) and nitrogen (N2).

### Claim 6 (depends on 5)

A method as in claim 5, wherein said nitrogen trifloride (NF3) concentration is between 0.1% and 20.0% of total gas cluster ion beam concentration.

### Claim 7 (depends on 1)

A method as in claim 1, wherein said gas cluster ion beam has an energy greater than 0.1 keV and less than 40.0 keV.

### Claim 8 (depends on 1)

A method as in claim 1, wherein said gas cluster ion beam etches said noble metal layer at a rate that is at least five (5) times faster than said gas cluster beam etches said alloy layer.

### Claim 9 (depends on 1)

A method as in claim 1, wherein said second dielectric layer is deposited by chemical vapor deposition (CVD).

### Claim 10

An interconnect structure, comprising:
a liner layer disposed on an intermediate interconnect feature, said intermediate interconnect feature having an opening etched in a dielectric layer of ultra low-k material, said liner layer protruding from said dielectric layer of ultra low-k material;
a conductive material disposed on said liner layer, said conductive material selected from a group consisting of copper (Cu), aluminum (Al) and alloys thereof, said conductive material filling a portion of said opening;
an alloy layer disposed on said conductive material, said alloy layer comprising a noble metal and said conductive material, said alloy layer filling remaining portion of said opening, said alloy layer protruding from said dielectric layer of ultra low-k material; and,
a dielectric layer disposed on top of said protruding liner layer, alloy layer, and dielectric layer of ultra low-k material.

### Claim 11 (depends on 10)

A structure as in claim 10, wherein said liner layer is selected from a group consisting of tantalum nitride (TaN), titanium nitride (TiN), ruthenium (Ru), and tungsten nitride (WN), iridium (Ir) and combinations thereof.

### Claim 12 (depends on 10)

A structure as in claim 10, wherein said liner layer has a thickness ranging from 10 A to 200 A.

### Claim 13 (depends on 10)

A structure as in claim 10, wherein said liner layer protrudes from said dielectric layer of ultra low-k material by a height ranging from 2 A to 100 A.

### Claim 14 (depends on 10)

A structure as in claim 10, wherein dielectric layer of ultra low-k material is formed from a material selected from a group consisting of porous and dense ultra-low k dielectrics.

### Claim 15 (depends on 10)

A structure as in claim 10, wherein said alloy layer comprises a material selected from a group consisting of ruthenium (Ru), rhodium (Rh), iridium (Ir), cobalt (Co), tungsten (W), platinum (Pt) and alloys thereof.

### Claim 16 (depends on 10)

A structure as in claim 10, wherein said alloy layer has a thickness ranging from approximately 1.0 A to approximately 100.0 A.

### Claim 17 (depends on 10)

A structure as in claim 10, wherein said alloy layer protrudes from said dielectric layer of ultra low-k material by a height ranging from approximately 2.0 A to approximately 100 A.

### Claim 18 (depends on 10)

A structure as in claim 10, wherein said dielectric layer is formed from a material selected from a group consisting of silicon nitride (Si3N4), silicon carbide (SiC), and nitrogen and hydrogen doped silicon carbide (SiC(N,H)).