# US 7,745,304 B2 · Method of manufacturing semiconductor device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,745,304 B2
- Document ID: US7745304B2
- Status: Granted
- Kind: B2
- Application number: 12/140,817
- Filed: 2008-06-17
- Published: 2008-12-25
- Granted: 2010-06-29
- Earliest claimed: 2007-06-22
- Assignees: Dongbu HiTek Co., Ltd.
- Inventors: Hyun-Ju Lim
- Web page: https://patentgrep.com/patent/US7745304B2

## CPC

- H10W 10/13: formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
- H10W 10/0124: {the regions having non-rectangular shapes, e.g. rounded (H10W10/0123 takes precedence)}
- H10W 10/0145: {of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence)}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a semiconductor device begins when a first dielectric pattern is formed on and/or over a substrate, and a first etching process is performed to form a trench in the substrate. An edge portion of the first trench is exposed. An oxidation process is performed on and/or over the substrate rounding the edge portion of the trench. A second dielectric is formed on and/or over the substrate including the trench, and a planarization process is performed on the second dielectric. A photoresist pattern is formed on and/or over the second dielectric corresponding to the trench, and a second etching process is performed to form a second dielectric pattern filling the trench. The photoresist pattern is removed. A second cleaning process is performed on the substrate including the trench to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern. A portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.

## Claims

### Claim 1

A method comprising:
forming a first dielectric pattern over a semiconductor substrate, and performing a first etching process to form at least one trench in the semiconductor substrate;
exposing an edge portion of the trench;
performing an oxidation process over the semiconductor substrate to round the edge portion of the trench;
forming a second dielectric over the semiconductor substrate thereby filling the trench;
performing a planarization process on the second dielectric formed over the semiconductor substrate;
forming a photoresist pattern over the second dielectric corresponding to the trench;
performing a second etching process to form a second dielectric pattern filling the trench;
removing the photoresist pattern formed over the second dielectric pattern; and
performing a second cleaning process on the semiconductor substrate comprising the trench filled with the second dielectric pattern to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern filling the trench,
wherein a portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first dielectric pattern comprises a pad oxide layer pattern and a nitride layer pattern.

### Claim 3 (depends on 2)

The method of claim 2, further comprising removing the nitride layer pattern before the forming of the second dielectric over the semiconductor substrate.

### Claim 4 (depends on 2)

The method of claim 2, wherein the edge portion of the first trench is exposed by performing a first cleaning process to remove an edge portion of the pad oxide layer pattern.

### Claim 5 (depends on 3)

The method of claim 3, wherein the remaining pad oxide layer pattern is removed by performing a third cleaning process on the semiconductor substrate after the performing of the second cleaning process on the semiconductor substrate.

### Claim 6 (depends on 4)

The method of claim 4, wherein each of the cleaning processes uses one of a buffered hydrogen fluoride solution and a dilute hydrogen fluoride solution as a cleaning solution.

### Claim 7 (depends on 1)

The method of claim 1, wherein the oxidation process is performed in a furnace.

### Claim 8 (depends on 1)

The method of claim 1, wherein the oxidation process is performed for a time ranging from about 50 minutes to 60 minutes at a temperature ranging from about 900° C. to about 1100° C.

### Claim 9 (depends on 1)

The method of claim 1, wherein the trench comprises a thermal oxide layer formed during the oxidation process.