# US 7,745,299 B2 · Semiconductor device and fabrication method thereof

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- Number: US 7,745,299 B2
- Document ID: US7745299B2
- Status: Granted
- Kind: B2
- Application number: 12/252,321
- Filed: 2008-10-15
- Published: 2009-02-05
- Granted: 2010-06-29
- Earliest claimed: 2005-12-29
- Assignees: Dongbu Electronics Co., Ltd.
- Inventors: Hyung Sun Yun
- Web page: https://patentgrep.com/patent/US7745299B2

## CPC

- H10D 64/511: {for IGFETs}
- H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 64/517: {characterised by the conducting layers}
- H10D 84/0172: {Manufacturing their gate conductors}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

In order to diversify a current control method of a semiconductor device, improve performance (including a current drive performance) of the semiconductor device, and reduce a size of the semiconductor device, a second gate may be formed inside a substrate that forms a channel upon applying a bias voltage thereto. In one aspect, the semiconductor device includes: a well region of a first conductivity; source and drain regions of a second conductivity in the well region; a first gate on an oxide layer above the well region, controlling a first channel region of a second conductivity between the source region and the drain region; and a second gate under the first channel region.

## Claims

### Claim 1

A method for fabricating a semiconductor device, comprising:
forming a first gate on an oxide layer above a well region in a semiconductor substrate;
forming source and drain regions in the well region;
implanting impurities by pocket ion implantation in the substrate to form a second gate;
forming a plug at an end of the second gate such that the plug is exposed to an exterior of the substrate;
forming a metal wiring at a surface of the substrate in contact with the plug; and
providing a first power source for applying a first power to the first gate and a second power source for applying an external power to the second gate.

### Claim 2 (depends on 1)

The method according to claim 1, comprising, prior to implanting the impurities into the substrate:
forming the well region, the well region having a first conductivity;
forming the source and drain regions, the source an drain regions having a second conductivity;
forming the oxide layer on the well region; and
forming the first gate on the oxide layer, the first gate being between the source and drain regions.

### Claim 3 (depends on 2)

The method of claim 2, where the first gate comprises polysilicon.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the pocket ion implantation method comprises adjusting an implantation amount, angle, and energy of impurity ions to determine a position and a distribution of the gate.

### Claim 5 (depends on 1)

The method according to claim 1, wherein forming the plug comprises implanting a high concentration of impurities.

### Claim 6 (depends on 1)

The method according to claim 1, wherein forming the plug comprises forming a trench and depositing polysilicon or a metal into the trench.

### Claim 7 (depends on 6)

The method of claim 6, wherein the plug comprises polysilicon.

### Claim 8 (depends on 6)

The method of claim 6, wherein the plug comprises tungsten and/or copper.

### Claim 9 (depends on 1)

The method according to claim 1, further comprising forming a second gate at a surface of the substrate to provide two channel regions in the substrate.

### Claim 10 (depends on 9)

The method according to claim 9, wherein the first and second gates are in parallel.

### Claim 11 (depends on 9)

The method of claim 9, wherein forming the first gate comprises:
forming a gate oxide layer on the exposed substrate;
forming said first gate on the gate oxide layer;
forming lightly doped source/drain regions in the substrate by ion implantation;
forming insulating spacers at sidewalls of the gate; and
implanting ions in the substrate in a high concentration using the spacers as a mask to form the source and drain regions overlapping with the lightly doped source/drain regions.

### Claim 12 (depends on 1)

The method according to claim 1, wherein implanting impurities in a substrate to form a second gate comprises:
forming a photoresist layer on the substrate;
patterning the photoresist layer to form a pocket photoresist pattern; and
implanting ions in the substrate using the pocket photoresist pattern as a mask to form a gate region at a predetermined depth in the substrate.

### Claim 13 (depends on 12)

The method according to claim 12, wherein patterning the photoresist layer comprises forming an edge of said pocket photoresist pattern in a rounded shape by a thermal treatment.

### Claim 14 (depends on 1)

The method of claim 1, further comprising, after forming said first gate:
forming an epitaxial layer of silicon on a surface of the substrate;
forming the source and drain regions in the epitaxial layer; and
forming the second gate on a surface of said epitaxial layer to provide two channel regions.

### Claim 15 (depends on 14)

The method of claim 14, where the first gate comprises polysilicon.

### Claim 16 (depends on 1)

The method according to claim 1, comprising, after implanting the impurities in the substrate:
forming the source and drain regions in the substrate;
forming the oxide layer on a surface of the substrate; and
forming the first gate on the oxide layer and between the source and drain regions.

### Claim 17 (depends on 16)

The method of claim 16, where the first gate comprises polysilicon.

### Claim 18 (depends on 1)

The method of claim 1, wherein implanting impurities using the first gate as a mask is performed at an implantation angle of 15-45°.

### Claim 19 (depends on 1)

The method of claim 1, wherein the impurities are implanted into the substrate at a concentration of from 1014-1021 atoms/cm3.