# US 7,745,251 B2 · Method of fabricating CMOS image sensor

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- Number: US 7,745,251 B2
- Document ID: US7745251B2
- Status: Granted
- Kind: B2
- Application number: 11/831,401
- Filed: 2007-07-31
- Published: 2008-02-21
- Granted: 2010-06-29
- Earliest claimed: 2006-08-16
- Assignees: Dongbu HiTeck Co., Ltd.
- Inventors: Jeong-Su Park
- Web page: https://patentgrep.com/patent/US7745251B2

## CPC

- H10F 39/1825: {Multicolour image sensors having stacked structure, e.g. NPN, NPNPN or multiple quantum well [MQW] structures}
- H10F 39/011: {Manufacture or treatment of image sensors covered by group H10F39/12}
- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A method of manufacturing a complimentary metal oxide semiconductor (CMOS) image sensor. The method includes a step of performing a silicide process relative to a plug for transferring electrons generated from a photodiode. The silicide of the plug blocks light irradiated through the plug, so that the performance of the image sensor may be optimized.

## Claims

### Claim 1

A method comprising:
forming at least one photo diode in a semiconductor substrate;
forming at least one contact plug in the semiconductor substrate; and
selectively forming a silicide region over said at least one contact plug,
wherein said at least one photo diode and said at least one contact plug are formed in a pixel region of the semiconductor substrate; and said selectively forming the silicide region over said at least one contact plug comprises forming the silicide region in a peripheral region of the semiconductor substrate.

### Claim 2 (depends on 1)

The method of claim 1, wherein said selectively forming a silicide region over said at least one contact plug comprises:
forming a silicide passivation layer over said at least one photo diode; and
etching the silicide passivation layer over said at least one contact plug to expose a surface of the semiconductor substrate over said at least one contact plug.

### Claim 3 (depends on 1)

The method of claim 1, wherein the method is a method of manufacturing a CMOS image sensor.

### Claim 4 (depends on 1)

The method of claim 1, wherein said at least one photo diode comprises:
a red detection diode;
a green detection diode; and
a blue detection diode.

### Claim 5 (depends on 4)

The method of claim 4, wherein:
said at least one contact plug comprises a first plug and a second plug;
the first plug contacts the red detection diode; and
the second plug contacts the green detection diode.

### Claim 6 (depends on 5)

The method of claim 5, wherein:
the red detection diode is formed below the green detection diode; and
the first plug is formed by a first ion implantation process and a second ion implantation process.

### Claim 7 (depends on 6)

The method of claim 6, wherein the second plug is formed by the second ion implantation process.

### Claim 8 (depends on 1)

The method of claim 1, wherein said selectively forming the suicide region comprises:
sputtering metal; and
annealing the metal.

### Claim 9 (depends on 1)

The method of claim 1, comprising:
forming an oxide layer over the semiconductor substrate; and
forming a metal interconnection and a contact.

### Claim 10 (depends on 9)

The method of claim 9, wherein the oxide layer comprises at least one of Phosphorous Silica Glass (PSG) and Undoped Silica Glass (USG).