Electronic circuit and integrated circuit including scan testing circuit, and power consumption reducing method used for integrated circuit
AssigneeNEC Corporation
InventorKohei Uchida
Life of this patent
Estimating the term…
Abstract
An integrated circuit with a scan testing circuit which enables reducing power consumption in normal operation mode is provided. A power-supply controller applies a power-supply voltage to internal and external transmission circuits in scan test mode and stops applying the power supply voltage in normal operation mode. Thus, power consumption associated with operations of the internal and external transmission circuits is eliminated, thereby reducing power consumption in normal operation mode.
Claims4
An electronic circuit having a scan testing circuit, comprising:
- a flip-flop having a master latch and a slave latch;
- a first transmission circuit which transmits a signal output from the flip-flop as a scan output signal;
- a second transmission circuit which transmits another signal output from the flip-flop as a normal output signal;
- a power-supply controller which applies a power-supply voltage to the first transmission circuit in the scan test mode and stops application of the power-supply voltage to the first transmission circuit in normal operation mode;
- wherein the power-supply controller comprises:
- a first switching transistor which turns ON to apply a first power-supply voltage to one power-supply input of the first transmission circuit in the scan test mode and turns OFF to stop application of the first power-supply voltage to the one power-supply input of the first transmission circuit in a normal operating mode;
- and
- a second switching transistor which turns ON to apply a first power-supply voltage to the other power-supply input of the first transmission circuit in the scan test mode and turns OFF to stop application of the first power-supply voltage to the other power-supply input of the first transmission circuit in the normal operating mode.
A method for reducing power consumption of an electronic circuit having a scan testing circuit in which a flip-flop is figured, and a transmission circuit is connected to the flip-flop, when the electronic circuit is switched from a normal operation mode to a scan test mode a test signal is input into the flip-flop, and the test signal output from the flip-flop is transmitted through the transmission circuit in the scan test mode, comprising the step of:
- applying a power-supply voltage to the transmission circuit in the scan test mode using a power supply controller;
- and
- stopping application of the power-supply voltage to the transmission circuit in the normal operation mode using the power supply controller,
- wherein the power supply controller includes a first switching transistor which turns ON for the applying the power-supply voltage to one power-supply input of the transmission circuit in the scan test mode and turns OFF for the stopping application of the power-supply voltage to the one power-supply input of the transmission circuit in the normal operating mode, and a second switching transistor which turns ON for the applying the power-supply voltage to the other power-supply input of the transmission circuit in the scan test mode and turns OFF for the stopping application of the power-supply voltage to the other power-supply input of the transmission circuit in the normal operating mode.
Dependencies are inferred from the claim text.