Register file bit and method for fast context switch
AssigneeInternational Business Machines Corporation
InventorDavid Arnold Luick
Life of this patent
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Abstract
A register file bit includes a primary latch and a secondary latch with a feedback path and a context switch mechanism that allows a fast context switch when execution changes from one thread to the next. A bit value for a second thread of execution is stored in the primary latch, then transferred to the secondary latch. The bit value for a first thread of execution is then written to the primary latch. When a context switch is needed (when the first thread stalls and the second thread needs to begin execution), the register file bit can perform a context switch from the first thread to the second thread in a single clock cycle. The register file bit contains a backup latch inside the register file itself so that minimal extra wire paths are needed to or from the existing register file.
Claims7
An integrated processor circuit comprising:
- an architectected register file for hardware multithreading comprising a register file bit that provides a fast context switch from a first thread to a second thread, the register file bit comprising:
- a primary latch having a data input and a data output;
- a plurality of secondary latches each having a data input and a data output;
- a feedback path from the data output of the plurality of secondary latches to the data input of the first latch, the feedback path including a data selection mechanism for selecting one data output from the plurality of secondary latches to feed back to the data input of the first latch;
- and
- a context switch mechanism that causes the data on the data output of the primary latch to be written to a selected one of the plurality of secondary latches, and that causes the data on the data output of the selected one secondary latch to be written to the primary latch.
Dependencies are inferred from the claim text.