Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system

A computer system, comprising:

• a plurality of processors, wherein the processors includes means for issuing a write address separate from data to be written to the write address;
• and
• a shared memory connected by a network to the plurality of processors, wherein the shared memory includes:
• means for receiving a first write request including a first write address;
• means for noting the write request address to the shared memory;
• means for stalling subsequent load and store requests to a memory location in the shared memory associated with the first write address until the data associated with the first write request is received and written by the shared memory;
• means for receiving write data in instruction order across the network without the write request address;
• and
• means for pairing the write request address with the separately transferred corresponding write data prior to storing the write data to the shared memory as a function of the write request address;
• wherein the processors enforce memory ordering in the subsequent load and store requests to the write request address until the write data associated with the first write request is written into the shared memory.

In a computer system having a plurality of processors connected to a shared memory, a method of decoupling a write address from its corresponding write data in a write to the shared memory, comprising:

• generating a write request address for a memory write, wherein the write request address points to a memory location in shared memory;
• issuing a first write request to the shared memory, wherein the first write request includes the write request address;
• noting the write request address in the shared memory;
• comparing, in the shared memory, addresses in subsequent read and write requests to the write request address;
• stalling the subsequent read requests to the write request address until the write data corresponding to the first write request is written into the shared memory;
• and
• if the address in a subsequent write request matches the write request address stored in the shared memory and there are no stalled read requests to the write request address, discarding the first write request.

In a computer system having a plurality of processors connected across a network to a shared memory, a method of decoupling a write address from its corresponding write data in a store to the shared memory, comprising:

• generating a write request address for a vector store to memory, wherein the write request address points to a memory location in the shared memory;
• transferring a vector store request to the shared memory, wherein the write request includes the write request address;
• noting the write request address to the shared memory;
• enforcing memory ordering in subsequent load and store requests to the write request address until the write data associated with the write request is written into the shared memory;
• when the corresponding write data becomes available, transferring the write data from a vector register to the shared memory in instruction order across the network without the write request address;
• pairing, within the shared memory, the write request address with the separately transferred corresponding write data;
• and
• storing the write data into the shared memory as a function of the write request address.

A method of decoupling vector data stores from vector instruction execution, comprising:

• executing a vector instruction on vector data stored in a vector register, wherein executing a vector instruction includes storing result vector data in the vector register;
• generating a vector write address for a vector store;
• transferring a vector store request across a network to memory, wherein the vector store request includes the vector write address;
• noting the vector write address in the memory;
• enforcing memory ordering in subsequent read and write requests to the vector write address until the result vector data associated with the vector store request is written into the memory;
• when the corresponding write data becomes available, transferring the result vector data from the vector register to the memory in instruction order across the network without the vector write address;
• pairing, within the memory, the vector write address with the separately transferred corresponding result vector data;
• and
• storing the result vector data into the memory as a function of the vector write address in the vector store request.

In a processor having a plurality of processing units connected across a network to a shared memory, a method of decoupling a write address from its corresponding write data in a write to the shared memory, comprising:

• generating a write request address for a memory write, wherein the write request address points to a memory location in the shared memory;
• transferring a write request to the shared memory, wherein the write request includes the write request address;
• storing the write request address in the shared memory;
• enforcing memory ordering in the subsequent read and write requests to the write request address until the write data associated with the request is written into the shared memory;
• when the corresponding write data becomes available, transferring the write data to the shared memory in instruction order across the network without the write request address;
• pairing, within the shared memory, the write request address with the separately transferred corresponding write data;
• and
• storing the corresponding write data into the shared memory as a function of the write request address.