Memory sharing method for sharing SRAM in an SOC device

A memory sharing method for at least a functional module and a target module, the functional module comprising at least a static random access memory (SRAM), the memory sharing method comprising:

• calculating a memory capacity of the functional module;
• if a total memory capacity of a module group satisfies a memory capacity requirement of the target module, allocating the SRAM of the module group, wherein the module group comprises at least one functional module;
• and
• accessing the SRAM of the functional module of the module group by utilizing the target module;
• wherein the memory capacity requirement of the target module is a product of an address number X and a bit number Y, the number of functional modules within the module group is m, the number of physically separated SRAM within the module group is n, an ith SRAM has an address number Xi and a bit number Yi, the memory capacity of the ith SRAM is a product of Xi and Yi, and i≦n,
• wherein when each address number Xi, where i=1˜n, is not less than X and a sum of each bit number Yi, where i=1˜n, is not less than Y, the step (b) comprises:
• allocating a portion of at least one of the ith SRAM as an allocated SRAM that with a bit number Yi—first and the address number X to meet the memory capacity requirement of the target module, where a sum of each bit number Yi—first is equal to Y and i≦n.

A memory sharing system for at least a functional module and a target module, the functional module comprising at least a static random access memory (SRAM), the memory sharing system comprising:

• a calculating device calculating a memory capacity of the functional module;
• a memory allocating device allocating the SRAM of a module group if a total memory capacity of the module group satisfies a memory capacity requirement of the target module, wherein the module group comprises at least one functional module;
• and
• a memory controller, arranged to access the SRAM of the functional module of the module group by utilizing the target module;
• wherein the memory capacity requirement of the target module is a product of an address number X and a bit number Y, the number of functional modules within the module group is m, the number of physically separated SRAM within the module group is n, an ith SRAM has an address number Xi and a bit number Yi, the memory capacity of the ith SRAM is a product of Xi and Yi, and i≦n,
• wherein when each address number Xi, where i=1˜n, is not less than X and a sum of each bit number Yi where i=1˜n, is not less than Y, the step comprises:
• allocating a portion of at least one of the ith SRAM as an allocated SRAM that with a bit number Yi—first and the address number X to meet the memory capacity requirement of the target module, where a sum of each bit number Yi—first is equal to Y and i≦n.