Dynamic random access memory with low-power refresh
AssigneeAgere Systems Inc.
InventorsRoss A. Kohler, Richard J. McPartland, Wayne E. Werner
Life of this patent
Estimating the term…
Abstract
A technique to reduce refresh power in a DRAM. In one embodiment, all of the DRAM memory cells are refreshed at a first rate and a subset of the memory cells are refreshed a second rate greater than the first rate. In another embodiment, the DRAM has a refresh controller that generates a refresh address and controls the refresh of the memory cells addressed by the refresh address. A marker memory is used by the refresh controller to determine which of the memory cells requires refreshing at a rate faster than the refresh rate of the remaining memory cells. Testing the DRAM uses a method to determine which of the memory cells are to be refreshed at the faster rate and to store the results in the marker memory.
Claims15
A dynamic memory comprising:
- a plurality of memory cells;
- a refresh controller adapted to refresh all of the memory cells at a first rate and refresh a subset of the memory cells at a second rate;
- wherein the second rate is greater than the first rate;
- wherein the refresh controller is further adapted, for all the memory cells in the dynamic memory and at the second rate, to:
- 1) generate a refresh address, 2) read a value in a marker memory addressed using the refresh address, and 3) selectively refresh, depending on the read value, memory cells addressed using the refresh address;
- and
- wherein the memory cells are organized into a number of rows and a number of columns addressed by corresponding row and column addresses, the memory cells in a row are refreshed at substantially the same time, the refresh address is a row address, and the number of values in the marker memory is equal to the number of rows.
A method of refreshing a dynamic memory having a plurality of memory cells organized into a number of rows and a number of columns addressed by corresponding row and column addresses, the memory cells in a row are refreshed at substantially the same time, the method comprising the steps of:
- a) refreshing all of the memory cells at a first rate;
- b) repeating, at a second rate greater than the first rate and for all the rows in the dynamic memory, the steps of:
- b1) generating a refresh row address;
- b2) reading a value in a marker memory addressed using the refresh row address;
- and
- b3) selectively refreshing, depending on the read value, memory cells in a row addressed using the refresh row address;
- wherein the number of values in the marker memory is equal to the number of rows of the dynamic memory.
Dependencies are inferred from the claim text.