Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorsChun-Seok Jeong, Beom-Ju Shin
Life of this patent
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Abstract
A circuit can control a bit rate of information output from a multi-purpose register (MPR) of a semiconductor memory device in a test mode, thereby reducing current consumption for outputting information in a multi-purpose register (MPR). The semiconductor memory device includes a multi-purpose register configured separately to store a plurality of information, and to control a bit rate of the stored information in a test mode, each of the information having multiple bits, and a connection selector configured selectively to connect an output terminal of the multi-purpose register to one of a number of global lines according to an operation mode.
Claims14
A semiconductor memory device, comprising:
- a multi-purpose register configured to separately store a plurality of information, and control a bit rate of the stored information in a test mode, each of the information having multiple bits;
- and
- a connection selector configured to selectively connect an output terminal of the multi-purpose register to a plurality of global lines, according to an operation mode.
Dependencies are inferred from the claim text.