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US 7,742,346 B2Granted
Voltage booster and memory structure using the same
AssigneeNanya Technology Corporation
InventorChih-Jen Chen
Life of this patent
Estimating the term…
Abstract
A voltage booster and a memory structure using the same are provided. When a data storage unit in the memory structure is in normal operation, all voltage pumps in the voltage booster are turned on for boosting a supply voltage. However, when the data storage unit is in standby state, in the voltage booster, some voltage pumps are turned on while other voltage pumps are turned off, for boosting the supply voltage. Accordingly, the standby current and power consumption are reduced and the pump efficiency is improved.
Claims12
A voltage booster, comprising:
- at least one first stage voltage pump, comprising a first pump circuit, wherein the first pump circuit transfers electronic charges from a supply voltage to a first node voltage;
- at least one second stage voltage pump, coupled to the first stage voltage pump, the second stage voltage pump comprising a second pump circuit, a third pump circuit, and an enabling circuit, wherein the enabling circuit controls on or off states of the third pump circuit according to an active signal, and the second pump circuit transfers electronic charges from the first node voltage to a second node voltage;
- and
- a switch, coupled to the second stage voltage pump;
- wherein when the third pump circuit is in normal operation, the third pump circuit transfers electronic charges from the second node voltage to an output voltage, and when the third pump circuit is turned off, the switch conducts the second node voltage as the output voltage, and the current of the output voltage is provided by the second pump circuit;
- and
- the first stage voltage pump further comprises:
- a first driving circuit, enhancing a first pulse signal and a second pulse signal and outputting the enhanced first pulse signal and the enhanced second pulse signal to the first pump circuit;
- a second driving circuit, enhancing a third pulse signal;
- and
- a first coupling element, coupling the third pulse signal enhanced by the second driving circuit to the first node voltage in order to boost the first node voltage.
8 more elements
A memory structure, comprising:
- a first voltage booster, generating a word line positive voltage, the first voltage booster comprising a plurality of voltage pumps;
- a second voltage booster, generating a word line negative voltage;
- a control circuit, generating an enabling signal according to an address signal and an active signal;
- a word line driving circuit, boosting the voltage level of the enabling signal to the word line positive voltage or the word line negative voltage according to the logic state of the enabling signal;
- and
- a data storage unit, being operated according to the enabling signal boosted by the word line driving circuit;
- wherein when the data storage unit is in standby state, a portion of the voltage pumps in the first voltage booster, which is used for generating the word line positive voltage, are turned off in order to reduce a standby current of the memory structure.
4 more elements
Dependencies are inferred from the claim text.