Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors
AssigneeGrandis, Inc.
InventorsEugene Chen, Yiming Huai, Alexander A. G. Driskill-Smith
Life of this patent
Estimating the term…
Abstract
A magnetic memory cell and a magnetic memory incorporating the cell are described. The magnetic memory cell includes at least one magnetic element and at least one non-planar selection device. The magnetic element(s) are programmable using write current(s) driven through the magnetic element. The magnetic memory may include a plurality of magnetic storage cells, a plurality of bit lines corresponding to the plurality of magnetic storage cells, and a plurality of source lines corresponding to the plurality of magnetic storage cells.
Claims20
A magnetic memory cell comprising:
- at least one magnetic element, the at least one magnetic element being programmable using at least one write current driven through the magnetic element;
- and
- at least one non-planar selection device coupled with the at least one magnetic element.
A magnetic memory comprising:
- a plurality of magnetic storage cells, each of the plurality of magnetic storage cells including at least one magnetic element and at least one non-planar selection device, the at least one magnetic element being programmable using at least one write current driven through the magnetic element;
- a plurality of bit lines corresponding to the plurality of magnetic storage cells;
- and
- a plurality of source lines corresponding to the plurality of magnetic storage cells.
A magnetic memory comprising:
- a plurality of magnetic storage cells, each of the plurality of magnetic storage cells including at least one magnetic element and at least one non-planar transistor, the at least one magnetic element being programmable using at least one write current driven through the magnetic element;
- a plurality of bit lines corresponding to the plurality of magnetic storage cells;
- providing and
- a plurality of source lines corresponding to the plurality of magnetic storage cells;
- wherein the non-planar transistor includes at least one of a multiple gate transistor;
- a silicon on oxide (SOI) transistor, a type of Fin field effect transistor (FinFET), a multiple-gate SOI transistor, a nanowire transistor, a (carbon) nanotube transistor, a delta transistor, a folded channel transistor, a triangular wire transistor, a vertical channel transistor, a vertical-source planar gate transistor, and a round-gate transistor.
A method for fabricating a magnetic memory comprising:
- providing a plurality of magnetic storage cells, each of the plurality of magnetic storage cells including at least one magnetic element and at least one non-planar selection device, the at least one magnetic element being programmable using at least one write current driven through the magnetic element;
- providing a plurality of bit lines corresponding to the plurality of magnetic storage cells;
- providing and
- providing a plurality of source lines corresponding to the plurality of magnetic storage cells.
Dependencies are inferred from the claim text.