Dual-use comparator/op amp for use as both a successive-approximation ADC and DAC

A reversible analog-digital converter comprising:

• an analog input;
• a digital input;
• a charge-sharing line;
• a plurality of switches controlled by digital bits that indicate when to connect to the analog input and when to connect to a fixed voltage;
• a plurality of capacitors having differing capacitance values and each having a terminal connected to the charge-sharing line and another terminal connected to a switch in the plurality of switches;
• control logic that generates the digital bits from the digital input when operating in a Digital-to-Analog Converter (DAC) mode, and that generates a sequence of the digital bits to cause the plurality of switches to adjust voltages applied to the plurality of capacitors to vary a voltage of the charge-sharing line to test a sequence of digital values during an Analog-to-Digital Converter (ADC) mode to determine a final digital value that represents a voltage of the analog input;
• a re-configurable comparator stage that comprises:
• a differential pre-amplifier having a first differential input connected to the charge-sharing line and a second differential input, for generating a differential intermediate output;
• a first intermediate switch that connects the differential intermediate output to a differential latch input during the ADC mode, and isolates the differential intermediate output from the differential latch input during the DAC mode;
• a second intermediate switch that connects the differential intermediate output to a differential amp input during the DAC mode, and isolates the differential intermediate output from the differential amp input during the ADC mode;
• a differential latch that receives the differential intermediate output from the first intermediate switch and stores a compare value determined by the differential intermediate output;
• wherein the compare value is applied to the control logic to determine a portion of the final digital value during ADC mode;
• a differential amplifier that receives the differential intermediate output from the second intermediate switch during DAC mode and buffers the differential intermediate output to generate a DAC output;
• and
• a feedback switch that connects the DAC output to the second differential input during the DAC mode, and isolates the DAC output from the second differential input during the ADC mode;
• wherein the DAC output is an analog output voltage that represents the digital input when operating in the DAC mode,
• whereby the plurality of capacitors and the re-configurable comparator stage are used both for conversion to analog an conversion to digital.

A dual-direction analog-digital converter comprising:

• an first analog input having a first analog input voltage,
• a second analog input having a second analog input voltage,
• a digital input receiving a digital input value;
• a fixed voltage;
• a first charge-sharing line;
• first switch means for switching voltages in response to a digital value;
• first array means for storing charge using weighted capacitance values of first capacitors, wherein each first capacitor is connected to the first charge-sharing line and to a plurality of the first switch means;
• wherein the digital value controls the first switch means to selectively connect first capacitors to the first analog input voltage and to the fixed voltage;
• first terminal capacitor means for sharing charge from the first charge-sharing line, wherein charge is shared between the first capacitors and the first terminal capacitor means to generate a first compare voltage;
• a second charge-sharing line;
• second switch means for switching voltages in response to a second digital value;
• second array means for storing charge using weighted capacitance values of second capacitors, wherein each second capacitor is connected to the second charge-sharing line and to a plurality of the second switch means;
• wherein the second digital value controls the second switch means to selectively connect second capacitors to the second analog input voltage and to the fixed voltage;
• second terminal capacitor means for sharing charge from the second charge-sharing line, wherein charge is shared between the second capacitors and the second terminal capacitor means to generate a second compare voltage;
• re-configurable means, receiving the first compare voltage, for comparing the first compare voltage to a second comparator input to generate a compare output and to generate a feedback output;
• feedback switch means for connecting the feedback output to the second comparator input during a digital-to-analog converter (DAC) mode, and for isolating the feedback output from the second comparator input during an Analog-to-Digital Converter (ADC) mode;
• ADC switch means for connecting the second comparator input to a second compare voltage during the ADC mode, and for isolating the second comparator input from the second compare voltage during the DAC mode;
• control logic means for adjusting the digital value and the second digital value during a sequence of compare operations during ADC mode, and for examining the compare output from the re-configurable means during the sequence of compare operations to determine a final digital value that represents a combination of the first analog input voltage and the second analog input voltage, and for applying the digital input value to the plurality of first switch means as the digital value during the DAC mode, wherein the re-configurable means generates an analog output represented by the digital input value during the DAC mode,
• whereby the re-configurable means and the first array means of first capacitors are used both for analog-to-digital conversion and for digital-to-analog conversion.