PLL circuit having loop filter and method of driving the same

A PLL circuit comprising:

• a phase detector that compares a phase of an input clock and a phase of a feedback clock to generate a pull-up control signal and a pull-down control signal;
• a loop filter that pumps a voltage in response to the pull-up and pull-down control signals to obtain a first and second pumping voltages and filters the first and second pumping voltages to output a control signal,
• wherein the loop filter further includes:
• a pumping unit having a pull-up pumping unit and a pull-down pumping unit to obtain the pumping voltages at an output terminal;
• and a filtering unit that filters the pumping voltages from the pumping unit, wherein the pull-up pumping unit is configured to generate a first pumping voltage from an external power supply voltage when the pull-up control signal is enabled, and the pull-down pumping unit is configured to connect to the pull-up pumping unit, generate a second pumping voltage from the first pumping voltage and supply the second pumping voltage to a ground terminal when the pull-down control signal is enabled, and wherein the compensator is connected to the filtering unit wherein the filtering unit includes:
• a first-stage filter having a first resistor with a first end and a second end and a first capacitor connected between the output terminal of the pumping unit and a ground terminal;
• and a second-stage filter connected in parallel to the first-stage filter and is composed of a second capacitor, and wherein the compensator makes potentials of both ends of the first resistor in the filtering unit equal to each other;
• a voltage controlled oscillator that receives the control signal to oscillate an output clock;
• and
• a clock divider that divides a frequency of the output clock at a predetermined rate to generate the feedback clock,
• wherein the loop filter includes a compensator that compensates for a difference between the first pumping voltage and the second pumping voltage and outputs the control signal, wherein the compensator includes:
• a comparator that compares the potentials of both ends of the first resistor and outputs a comparison signal;
• a transistor that has a gate to which the comparison signal of the comparator is input, a drain to which the potential of the first end of the first resistor is input, and a source to which the potential of the second end of the first resistor is input;
• and
• a second resistor connected between the ground terminal and the source of the transistor.