US 7,741,822 B2 · DC-DC converter

Abstract

The invention provides DC-DC converters comprising a load sensor, a variable Power MOS, and a Power MOS width controlling and driving device. The Power MOS width controlling and driving device is coupled between the load sensor and the variable Power MOS. The variable Power MOS comprises a plurality of PMOS transistors coupled in parallel and a plurality of NMOS transistors coupled in parallel. After the load sensor detects the load current of the DC-DC converter, the Power MOS width controlling and driving device conducts the PMOS and NMOS transistors according to the sensed load current to control the total size of the conduction paths that couple a transformed DC voltage output terminal to a source of an original DC voltage or ground.

Claims16

Dependent claims

A DC-DC converter, comprising:

a load sensor, sensing a load current of the DC-DC converter;
a variable Power MOS, comprising a plurality of PMOS transistors coupled in parallel and a plurality of NMOS transistors coupled in parallel;
and
a Power MOS width controlling and driving device, coupled between the load sensor and the variable Power MOS, and controlling the conduction of the PMOS and NMOS transistors according to the sensed load current.

1 more element

A DC-DC converter, comprising:

a load sensor, sensing a load current of the DC-DC converter;
a Dithering Skip Modulation controller, generating a Dithering Skip Modulation control section which length is inverse proportional to the sensed load current, and dividing the Dithering Skip Modulation control section by a Dithering Skip Modulation unit length to generate a Dithering Skip Modulation signal, wherein each Dithering Skip Modulation unit length comprises a Dithering Skip Modulation indicator and the Dithering Skip Modulation signal is low at the Dithering Skip Modulation indicators;
a PWM signal generator, generating a PWM signal based on a transformed DC voltage of the DC-DC converter;
an NAND gate, having input terminals coupled with the inverse signal of the PWM signal and the Dithering Skip Modulation signal;
a Power MOS enable signal generator, generating a PMOS transistor enable signal and an NMOS transistor enable signal based on the output of the NAND gate;
and
a Power MOS, controlled by the PMOS transistor enable signal and the NMOS transistor enable signal to adjust the transformed DC voltage.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/016,617Filed 18 Jan 2008

Priority

TW 96129357 A9 Aug 2007

Published

US 2009/0039842 A112 Feb 2009

Granted

22 Jun 2010

Term ends

Not estimatedThe source records don’t support an estimate.

Classification3 codes

H02M 3/1584
Including plural semiconductor devices as final control devices for a single load: with a plurality of power processing stages connected in parallel
H02M 1/0012
Details of control, feedback or regulation circuits: control circuits using digital or numerical techniques
H02M
Apparatus for conversion between ac and ac, between ac and dc, or

DC-DC converter

Life of this patent

DC-DC converter

Life of this patent

Abstract

Claims16