Solid state power control and method for reducing control power

A solid state power control apparatus comprising:

• a switch;
• a microcontroller that controls the switch and receives communication signals, the microcontroller having an active state and a sleep state, wherein the sleep state corresponds to interruption of the communication signals for a predetermined time period;
• a first, operation microprocessor operable to control operation of the solid state power control;
• and
• a second, status microprocessor operable to communicate with the microcontroller to control a status of the solid state power control, wherein the microcontroller receives the communication signals from each of the first microprocessor and the second microprocessor, wherein the first microprocessor communicates command data to the microcontroller to open or close the switch and the second microprocessor communicates with the microcontroller to exchange switch status data.

A method of controlling a solid state power controller, comprising:

• (a) sending communication signals to a microcontroller of a solid state power controller, wherein step (a) includes sending the communication signals from each of a first microprocessor and a second microprocessor to the microcontroller;
• (b) selectively switching the microcontroller between an active state and a sleep state in response to interruption of the communication signals;
• and
• (c) selectively switching to the sleep state in response to a loss of serial communication signals.

A solid state power control system comprising:

• a power source that provides an amount of electric output;
• and
• a solid state power control comprising:
• a switch;
• and
• a microcontroller that controls the switch and receives communication signals, the microcontroller having an active state and a sleep state, the sleep state corresponding to interruption of the communication signals for a predetermined time period, wherein the microcontroller autonomously switches between the active state and the sleep state in response to interruption of the communication signals, and wherein the microcontroller consumes a first amount of electric output in the active state and consumes a second amount of electric output in the sleep state that is less then the first amount;
• a first, operation microprocessor operable to control operation of the solid state power control;
• and
• a second, status microprocessor operable to communicate with the microcontroller to control a status of the solid state power control, wherein the microcontroller receives the communication signals from each of the first microprocessor and the second microprocessor.