Leadframe and mold compound interlock in packaged semiconductor device
AssigneesTexas Instruments Incorporated, Texas Instruments Deutschland GmbH
InventorsBernhard Lange, Steven Kummerl
Life of this patent
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Abstract
An interference interlock between leadframe features and a mold compound is provided in a packaged semiconductor device by exposing at least one predetermined surface area to an etching process prior to a molding step. This produces an etched recess with a recessed wall delimited by a step wall, generally perpendicular and adjacent to the recessed wall. The step wall is partially undercut by etching. During the molding step, the recessed wall and the step wall are both contacted by and embedded in the molding compound.
Claims5
A method for providing an interference interlock between leadframe features and a molding compound in a packaged semiconductor device, the method comprising:
- exposing at least one predetermined surface area of the leadframe to an etching process that produces an etched recess with a recessed wall that extends from a top wall toward a bottom wall, wherein the recessed wall being delimited by a step wall generally perpendicular and adjacent to the recessed wall, and wherein the step wall being at least partially undercut by etching to form a curve from the top wall to the recess wall that is substantially concave in shape;
- and
- in a subsequent molding step, contacting both the recessed wall and the step wall by and embedding the recessed wall and the step wall in the molding compound;
- wherein multiple similar semiconductor devices are simultaneously packaged on a common leadframe, and the multiple packaged semiconductor devices are separated into individual devices by cutting through the cured molding compound and common leadframe along predetermined separation lines;
- wherein at least one of the separation lines extends through an etched recess in the leadframe.
Dependencies are inferred from the claim text.