Method for integrating trench MOS Schottky barrier devices into integrated circuits and related semiconductor devices
AssigneeNational Semiconductor Corporation
InventorTerry Dyer
Life of this patent
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AssigneeNational Semiconductor Corporation
InventorTerry Dyer
Estimating the term…
Trenches are formed in a semiconductor substrate, where the trenches include an outer trench and multiple inner trenches within the outer trench. A metal-oxide semiconductor (MOS) device and a trench MOS Schottky barrier (TMBS) device are also formed in the semiconductor substrate using the trenches. The MOS device could include the outer trench, and the TMBS device could include the inner trenches. At least one of the inner trenches may contact the outer trench, and/or at least one of the inner trenches may be electrically isolated from the outer trench. The MOS device could represent a trench vertical double-diffused metal-oxide semiconductor (VDMOS) device, and the TMBS device may be monolithically integrated with the trench VDMOS device in the semiconductor substrate. A guard ring that covers portions of the inner trenches and that is open over other portions of the inner trenches could optionally be formed in the semiconductor substrate.
A method comprising:
An integrated circuit comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.