Backside illuminated imaging sensor with backside P+ doped layer
AssigneeOmniVision Technologies, Inc.
InventorsHidetoshi Nozaki, Howard E. Rhodes
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Abstract
A backside illuminated imaging sensor includes a semiconductor layer having a P-type region. A frontside and backside P+ doped layers are formed within the semiconductor layer. An imaging pixel having a photodiode is formed within the semiconductor layer, where the photodiode is an N− region formed within the P-type region of the semiconductor layer between the frontside P+ doped layer and the backside P+ doped layer.
Claims25
A complementary metal-oxide-semiconductor (“CMOS”) backside illuminated imaging sensor, comprising:
- a semiconductor layer having a P-type region;
- a frontside P+ doped layer formed within the semiconductor layer;
- a backside P+ doped layer formed within the semiconductor layer, wherein the backside P+ doped layer has a graded concentration of a first dopant extending from a back surface of the semiconductor layer to a first distance from the back surface of the semiconductor layer such that a first concentration of the first dopant at the back surface of the semiconductor layer is greater than a second concentration of the first dopant at the first distance from the back surface of the semiconductor layer;
- and
- an imaging pixel having a photodiode formed within the semiconductor layer, wherein the photodiode is an N− region formed within the P-type region of the semiconductor layer between the frontside P+ doped layer and the backside P+ layer.
An imaging sensor comprising:
- a semiconductor layer having a front surface and a back surface, the semiconductor layer having a complementary metal-oxide-semiconductor (“CMOS”) backside illuminated array of imaging pixels, wherein each imaging pixel includes:
- a frontside P+ doped layer formed within the semiconductor layer;
- a backside P+ doped layer formed within the semiconductor layer,
- wherein the backside P+ doped layer has a graded concentration of a first dopant extending from the back surface of the semiconductor layer to a first distance from the back surface of the semiconductor layer such that a first concentration of the first dopant at the back surface of the semiconductor layer is greater than a second concentration of the first dopant at the first distance from the back surface of the semiconductor layer;
- and
- a photodiode formed within the semiconductor layer, wherein the photodiode is an N− region formed within the P-type region between the frontside P+ doped layer and the backside P+ layer.
A method of fabricating an array of complementary metal-oxide-semiconductor (“CMOS”) backside illuminated imaging pixels, comprising:
- fabricating a plurality of photodiodes within a semiconductor layer from a front surface of the semiconductor layer, wherein the plurality of photodiodes are N− regions formed within a P-type region;
- implanting a frontside P+ doped layer within the semiconductor layer from the front surface of the semiconductor layer;
- and
- implanting a backside P+ doped layer within the semiconductor layer from a back surface of the semiconductor layer, wherein the backside P+ doped layer has a graded concentration of a first dopant extending from the back surface of the semiconductor layer to a first distance from the back surface of the semiconductor layer such that a first concentration of the first dopant at the back surface of the semiconductor layer is greater than a second concentration of the first dopant at the first distance from the back surface of the semiconductor layer, wherein the N− region is disposed between the frontside P+ doped layer and the backside P+ doped layer.
Dependencies are inferred from the claim text.