Isolation and termination structures for semiconductor die
AssigneeAdvanced Analogic Technologies, Inc.
InventorsDonald R. Disney, Richard K. Williams
Life of this patent
Estimating the term…
Abstract
Various integrated circuit devices, including a lateral DMOS transistor, a quasi-vertical DMOS transistor, a junction field-effect transistor (JFET), a depletion-mode MOSFET, and a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
Claims10
An isolation structure formed in a semiconductor substrate of a first conductivity type, the substrate not comprising an epitaxial layer, the isolation structure comprising:
- a floor isolation region of a second conductivity type opposite to the first conductivity type submerged in the substrate;
- a trench extending from a surface of the substrate at least to the floor isolation region, the trench comprising a dielectric material, the trench and the floor isolation region together forming an isolated pocket of the substrate;
- a guard ring of the first conductivity type at the surface of the substrate outside the isolated pocket, the guard ring having a doping concentration greater than a doping concentration of the substrate;
- wherein the floor isolation region extends a predetermined distance beyond an outside edge of the trench in a direction towards the guard ring.
Dependencies are inferred from the claim text.