Semiconductor device having stacked transistors
AssigneeSamsung Electronics Co., Ltd.
InventorsGyu-Ho Lyu, Seug-Gyu Kim
Life of this patent
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Abstract
A semiconductor device includes a first semiconductor layer, a first interlayer insulation layer, a second semiconductor layer, and a gate pattern. The first interlayer insulation layer covers the first semiconductor layer. The second semiconductor layer is formed on the first interlayer insulation layer and includes source regions, drain regions, and a channel region interposed between the source region and the drain region. The gate pattern includes a gate insulation layer on the channel region of the second semiconductor layer. At least one of the source regions and the drain regions includes an elevated layer having a top surface higher than that of the channel region.
Claims13
A semiconductor device, comprising:
- a first semiconductor layer;
- a first interlayer insulation layer covering the first semiconductor layer;
- a second semiconductor layer on the first interlayer insulation layer, the second semiconductor layer comprising a source region, a drain region and a channel region between the source and drain regions;
- a gate pattern on the channel region;
- and
- a conducting column extending through at least one of the source and drain regions,
- wherein at least one of the source and drain regions comprises a low-concentration impurity region and an elevated high-concentration impurity region, wherein a top surface of the elevated high-concentration impurity region is above a top surface of the channel region, and
- wherein at least a portion of a sidewall of each of the low-concentration impurity region and the elevated high-concentration impurity region contacts a side portion of the conducting column.
Dependencies are inferred from the claim text.