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US 7,737,782 B1Granted
Operational amplifier circuit
AssigneeSeiko Instruments Inc.
InventorMinoru Sudou
Life of this patent
Estimating the term…
Abstract
Provided is a CMOS operational amplifier circuit that can operate with low noise, with low current consumption, and with stability. A cascode bias voltage of a folded cascode circuit in the CMOS operational amplifier circuit is modulated by a current at an input differential stage, thereby enabling operation with low noise, with low current consumption, and with stability.
Claims3
A CMOS operational amplifier circuit, comprising:
- a differential input circuit part;
- and
- a folded cascode circuit part,
- wherein the differential input circuit part comprises:
- a p-type MOS transistor differential pair and an n-type MOS transistor differential pair, which have a positive input terminal and a negative input terminal in common;
- a first constant current circuit that supplies an operation current to the p-type MOS transistor differential pair and the n-type MOS transistor differential pair;
- and
- a current changeover circuit that supplies the operation current of the first constant current circuit to the p-type MOS transistor differential pair and the n-type MOS transistor differential pair in turn,
- wherein the folded cascode circuit part comprises:
- a cascode connection current mirror circuit;
- a second constant current circuit and a third constant current circuit, which are connected in series with the cascade connection current mirror circuit;
- and
- a bias voltage source that applies a bias voltage to the cascode connection current mirror circuit, and
- wherein the bias voltage source increases the bias voltage when the operation current flows in the n-type MOS transistor differential pair.
11 more elements
Dependencies are inferred from the claim text.