Avoiding signals when tracing user processes
AssigneeOracle America, Inc.
InventorAdam H. Leventhal
Life of this patent
Estimating the term…
Abstract
A method for tracing an instrumented program, including triggering a probe in the instrumented program, obtaining an original instruction associated with the probe, loading the original instruction into a scratch space, beginning execution of the original instruction in the scratch space using a thread, detecting a state of a signal received by a signal handler, and if the signal is asynchronous, executing a second instruction corresponding to the signal after executing the original instruction, and if the signal is synchronous, executing a third instruction corresponding to the signal and resetting a program counter to a location of the original instruction where the probe in the instrumented program was triggered.
Claims19
A computer readable medium comprising software instructions for tracing an instrumented program, the software instructions executable on a processor and comprising functionality for:
- transferring control of the instrumented program from a kernel to a trap handler when a probe in the instrumented program is triggered;
- obtaining, by the trap handler, an original instruction associated with the probe;
- loading, by the trap handler, the original instruction into a scratch space;
- beginning, by the trap handler, execution of the original instruction in the scratch space using a thread;
- detecting a state of a signal received by a signal handler during the execution of the original instruction, by the trap handler, in the scratch space;
- and
- if the state of the signal is asynchronous:
- suspending, by the signal handler, execution of a second instruction corresponding to the signal;
- inserting, by the signal handler, the signal in the instrumented program after the original instruction;
- executing, by the trap handler, the original instruction in the scratch space using the thread;
- returning the control of the instrumented program to the kernel;
- and
- executing the second instruction corresponding to the signal after executing the original instruction;
- if the state of the signal is synchronous, executing a third instruction corresponding to the signal and resetting a program counter to a location of the original instruction where the probe in the instrumented program was triggered.
A system for tracing an instrumented program, comprising:
- a memory configured to store:
- a look-up table arranged to store an address and a corresponding original instruction;
- and
- a scratch space arranged to store the corresponding original instruction;
- a processor configured to execute:
- the instrumented program using a thread under control of a kernel, wherein the thread transfers control from the kernel to a trap handler when a probe in the instrumented program is triggered;
- a trap handler configured to halt execution of the thread when a trap instruction is encountered and use an address of the trap instruction to obtain the corresponding original instruction from the look-up table;
- a signal handler configured to detect a state of a received signal during the execution of the original instruction in the scratch space;
- and
- a program counter configured to store a value corresponding to a current address of the thread executing in the instrumented program,
- wherein if the state of the received signal is asynchronous, the processor:
- suspends, by the signal handler, execution of a second instruction corresponding to the received signal;
- inserts, by the signal handler, the received signal in the instrumented program after the corresponding original instruction;
- executes, by the trap handler, the corresponding original instruction in the scratch space;
- returns the control of the instrumented program to the kernel;
- and
- executes the second instruction corresponding to the received signal upon completing execution of the corresponding original instruction in the scratch space;
- and
- wherein if the state of the received signal is synchronous, the processor resets execution of the thread to the address of the trap instruction.
Dependencies are inferred from the claim text.